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Correct place for checkAck() so ack pulse lenth is correct
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@ -135,8 +135,9 @@ bool DCCWaveform::interrupt1() {
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state = 0;
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state = 0;
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break;
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break;
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}
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}
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// ACK check is prog track only
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if (ackPending) checkAck();
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return false;
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return false;
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}
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}
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@ -185,11 +186,6 @@ void DCCWaveform::interrupt2() {
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}
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}
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}
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}
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}
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}
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// ACK check is prog track only and will only be checked if bits_sent=4 ...
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// This means only once per 9-bit-byte AND never at the same cycle as the
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// relatively expensive packet change code just above.
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if (ackPending && bits_sent==4) checkAck();
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}
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}
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@ -266,7 +262,7 @@ void DCCWaveform::checkAck() {
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// detected trailing edge of pulse
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// detected trailing edge of pulse
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ackPulseDuration=micros()-ackPulseStart;
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ackPulseDuration=micros()-ackPulseStart;
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if (ackPulseDuration>1000 && ackPulseDuration<9000) {
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if (ackPulseDuration>3000 && ackPulseDuration<8500) {
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ackCheckDuration=millis()-ackCheckStart;
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ackCheckDuration=millis()-ackCheckStart;
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ackDetected=true;
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ackDetected=true;
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ackPending=false;
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ackPending=false;
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@ -2,7 +2,7 @@
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#define DCCWaveform_h
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#define DCCWaveform_h
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const int POWER_SAMPLE_MAX = 300;
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const int POWER_SAMPLE_MAX = 1000; // XXX only until correct short detection on prog rail is implemented
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const int POWER_SAMPLE_ON_WAIT = 100;
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const int POWER_SAMPLE_ON_WAIT = 100;
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const int POWER_SAMPLE_OFF_WAIT = 1000;
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const int POWER_SAMPLE_OFF_WAIT = 1000;
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const int POWER_SAMPLE_OVERLOAD_WAIT = 4000;
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const int POWER_SAMPLE_OVERLOAD_WAIT = 4000;
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