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https://github.com/DCC-EX/CommandStation-EX.git
synced 2024-11-26 17:46:14 +01:00
remove uneccessary workaround, compensate for interrupt length
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parent
71117bc7a1
commit
10209ed6f3
27
DCCRMT.cpp
27
DCCRMT.cpp
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@ -20,8 +20,9 @@
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#include "defines.h"
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#include "DIAG.h"
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#include "DCCRMT.h"
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#include "soc/periph_defs.h"
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#include "driver/periph_ctrl.h"
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//#include "soc/periph_defs.h"
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//#include "driver/periph_ctrl.h"
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#if ESP_IDF_VERSION < ESP_IDF_VERSION_VAL(4,2,0)
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#error wrong IDF version
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@ -41,6 +42,13 @@ void setDCCBit0(rmt_item32_t* item) {
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item->duration1 = DCC_0_HALFPERIOD;
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}
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void setDCCBit0Last(rmt_item32_t* item) {
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item->level0 = 1;
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item->duration0 = DCC_0_HALFPERIOD + DCC_0_HALFPERIOD/10;
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item->level1 = 0;
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item->duration1 = DCC_0_HALFPERIOD;
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}
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void setEOT(rmt_item32_t* item) {
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item->val = 0;
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}
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@ -56,9 +64,9 @@ RMTPin::RMTPin(byte pin, byte ch, byte plen) {
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preambleLen = plen+2; // plen 1 bits, one 0 bit and one EOF marker
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preamble = (rmt_item32_t*)malloc(preambleLen*sizeof(rmt_item32_t));
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for (byte n=0; n<plen; n++)
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setDCCBit1(preamble + n); // preamble bits
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setDCCBit0(preamble + plen); // start of packet 0 bit
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setEOT(preamble + plen + 1); // EOT marker
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setDCCBit1(preamble + n); // preamble bits
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setDCCBit0Last(preamble + plen); // start of packet 0 bit
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setEOT(preamble + plen + 1); // EOT marker
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// idle
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idleLen = 29;
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@ -70,7 +78,7 @@ RMTPin::RMTPin(byte pin, byte ch, byte plen) {
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for (byte n=18; n<26; n++) // 18 to 25
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setDCCBit1(idle + n);
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setDCCBit1(idle + 26); // end bit
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setDCCBit0(idle + 27); // finish always with 0
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setDCCBit0Last(idle + 27); // finish always with 0
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setEOT(idle + 28); // EOT marker
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rmt_config_t config;
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@ -83,8 +91,11 @@ RMTPin::RMTPin(byte pin, byte ch, byte plen) {
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config.mem_block_num = 1; // With MAX_PACKET_SIZE = 5 and number of bits needed
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// MAX_PACKET_SIZE+1 * 8 + MAX_PACKET_SIZE = 54 one
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// mem block of 64 RMT items (=DCC bits) should be enough
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periph_module_disable(PERIPH_RMT_MODULE);
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periph_module_enable(PERIPH_RMT_MODULE);
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// this was not our problem https://esp32.com/viewtopic.php?t=5252
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//periph_module_disable(PERIPH_RMT_MODULE);
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//periph_module_enable(PERIPH_RMT_MODULE);
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ESP_ERROR_CHECK(rmt_config(&config));
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// NOTE: ESP_INTR_FLAG_IRAM is *NOT* included in this bitmask
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ESP_ERROR_CHECK(rmt_driver_install(config.channel, 0, ESP_INTR_FLAG_LOWMED|ESP_INTR_FLAG_SHARED));
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@ -1 +1 @@
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#define GITHUB_SHA "ESP32-2021114-14:49"
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#define GITHUB_SHA "ESP32-2021114-15:35"
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