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https://github.com/DCC-EX/CommandStation-EX.git
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Update for devel 5.2.20
Update for devel 5.2.20
This commit is contained in:
Ash-4
GitHub
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174a456a58
50
DCCRMT.cpp
50
DCCRMT.cpp
@ -1,5 +1,5 @@
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/*
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* © 2021-2022, Harald Barth.
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* © 2021-2024, Harald Barth.
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*
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* This file is part of DCC-EX
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*
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@ -25,6 +25,18 @@
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#include "DCCWaveform.h" // for MAX_PACKET_SIZE
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#include "soc/gpio_sig_map.h"
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// check for right type of ESP32
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#include "soc/soc_caps.h"
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#ifndef SOC_RMT_MEM_WORDS_PER_CHANNEL
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#error This symobol should be defined
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#endif
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#if SOC_RMT_MEM_WORDS_PER_CHANNEL < 64
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#warning This is not an ESP32-WROOM but some other unsupported variant
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#warning You are outside of the DCC-EX supported hardware
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#endif
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static const byte RMT_CHAN_PER_DCC_CHAN = 2;
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// Number of bits resulting out of X bytes of DCC payload data
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// Each byte has one bit extra and at the end we have one EOF marker
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#define DATA_LEN(X) ((X)*9+1)
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@ -75,12 +87,30 @@ void IRAM_ATTR interrupt(rmt_channel_t channel, void *t) {
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RMTChannel::RMTChannel(pinpair pins, bool isMain) {
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byte ch;
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byte plen;
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// Below we check if the DCC packet actually fits into the RMT hardware
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// Currently MAX_PACKET_SIZE = 5 so with checksum there are
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// MAX_PACKET_SIZE+1 data packets. Each need DATA_LEN (9) bits.
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// To that we add the preamble length, the fencepost DCC end bit
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// and the RMT EOF marker.
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// SOC_RMT_MEM_WORDS_PER_CHANNEL is either 64 (original WROOM) or
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// 48 (all other ESP32 like the -C3 or -S2
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// The formula to get the possible MAX_PACKET_SIZE is
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//
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// ALLOCATED = RMT_CHAN_PER_DCC_CHAN * SOC_RMT_MEM_WORDS_PER_CHANNEL
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// MAX_PACKET_SIZE = floor((ALLOCATED - PREAMBLE_LEN - 2)/9 - 1)
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//
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if (isMain) {
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ch = 0;
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plen = PREAMBLE_BITS_MAIN;
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static_assert (DATA_LEN(MAX_PACKET_SIZE+1) + PREAMBLE_BITS_MAIN + 2 <= RMT_CHAN_PER_DCC_CHAN * SOC_RMT_MEM_WORDS_PER_CHANNEL,
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"Number of DCC packet bits greater than ESP32 RMT memory available");
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} else {
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ch = 2;
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ch = RMT_CHAN_PER_DCC_CHAN; // number == offset
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plen = PREAMBLE_BITS_PROG;
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static_assert (DATA_LEN(MAX_PACKET_SIZE+1) + PREAMBLE_BITS_PROG + 2 <= RMT_CHAN_PER_DCC_CHAN * SOC_RMT_MEM_WORDS_PER_CHANNEL,
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"Number of DCC packet bits greater than ESP32 RMT memory available");
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}
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// preamble
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@ -115,7 +145,7 @@ RMTChannel::RMTChannel(pinpair pins, bool isMain) {
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// data: max packet size today is 5 + checksum
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maxDataLen = DATA_LEN(MAX_PACKET_SIZE+1); // plus checksum
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data = (rmt_item32_t*)malloc(maxDataLen*sizeof(rmt_item32_t));
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rmt_config_t config;
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// Configure the RMT channel for TX
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bzero(&config, sizeof(rmt_config_t));
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@ -123,20 +153,10 @@ RMTChannel::RMTChannel(pinpair pins, bool isMain) {
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config.channel = channel = (rmt_channel_t)ch;
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config.clk_div = RMT_CLOCK_DIVIDER;
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config.gpio_num = (gpio_num_t)pins.pin;
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config.mem_block_num = 2; // With longest DCC packet 11 inc checksum (future expansion)
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// number of bits needed is 22preamble + start +
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// 11*9 + extrazero + EOT = 124
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// 2 mem block of 64 RMT items should be enough
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config.mem_block_num = RMT_CHAN_PER_DCC_CHAN;
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// use config
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ESP_ERROR_CHECK(rmt_config(&config));
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addPin(pins.invpin, true);
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/*
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// test: config another gpio pin
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gpio_num_t gpioNum = (gpio_num_t)(pin-1);
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PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[gpioNum], PIN_FUNC_GPIO);
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gpio_set_direction(gpioNum, GPIO_MODE_OUTPUT);
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gpio_matrix_out(gpioNum, RMT_SIG_OUT0_IDX, 0, 0);
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*/
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// NOTE: ESP_INTR_FLAG_IRAM is *NOT* included in this bitmask
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ESP_ERROR_CHECK(rmt_driver_install(config.channel, 0, ESP_INTR_FLAG_LOWMED|ESP_INTR_FLAG_SHARED));
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@ -2,7 +2,7 @@
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* © 2021 M Steve Todd
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* © 2021 Mike S
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* © 2021 Fred Decker
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* © 2020-2021 Harald Barth
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* © 2020-2024 Harald Barth
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* © 2020-2021 Chris Harlow
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* All rights reserved.
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*
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@ -33,9 +33,9 @@
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// Number of preamble bits.
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const int PREAMBLE_BITS_MAIN = 16;
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const int PREAMBLE_BITS_PROG = 22;
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const byte MAX_PACKET_SIZE = 5; // NMRA standard extended packets, payload size WITHOUT checksum.
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const byte PREAMBLE_BITS_MAIN = 16;
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const byte PREAMBLE_BITS_PROG = 22;
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const byte MAX_PACKET_SIZE = 5; // NMRA standard extended packets, payload size WITHOUT checksum.
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// The WAVE_STATE enum is deliberately numbered because a change of order would be catastrophic
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@ -85,9 +85,9 @@ EthernetInterface::EthernetInterface()
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DCCTimer::getSimulatedMacAddress(mac);
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DIAG(F("Ethernet got MAC address"));
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#ifdef IP_ADDRESS
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if (Ethernet.begin(IP_ADDRESS) == 0)
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#else
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if (Ethernet.begin(mac, IP_ADDRESS) == 0)
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#else
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if (Ethernet.begin(mac) == 0)
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#endif
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{
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DIAG(F("Ethernet.begin FAILED"));
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@ -1 +1 @@
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#define GITHUB_SHA "devel-202401030135Z"
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#define GITHUB_SHA "devel-202401081219Z"
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@ -3,7 +3,9 @@
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#include "StringFormatter.h"
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#define VERSION "5.2.18ethCdf"
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#define VERSION "5.2.20ethCdf"
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// 5.2.20 - Check return of Ethernet.begin()
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// 5.2.19 - ESP32: Determine if the RMT hardware can handle DCC
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// 5.2.18 - Display network IP fix
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// 5.2.17 - ESP32 simplify network logic
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// 5.2.16 - Bugfix to allow for devices using the EX-IOExpander protocol to have no analogue or no digital pins
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