mirror of
https://github.com/DCC-EX/CommandStation-EX.git
synced 2024-12-23 12:51:24 +01:00
Update I2CRailcom.h
Do a TX of 0x09 to check if baudrate is set correctly at end of Init_SC16IS752() Strange thing is that the UART sent the 0x09 twice, the call is only done once Fixed readback when sending a SRESET, see comments Checked if I can read the LSR, not errors Still no data entering the UART as the RXLV register stay at 0
This commit is contained in:
kempe63
parent
4739bb16ff
commit
6293b0ae1d
100
IO_I2CRailcom.h
100
IO_I2CRailcom.h
@ -87,13 +87,16 @@ public:
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DIAG(F("I2CRailcom: %s UART%S detected"),
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_I2CAddress.toString(), exists?F(""):F(" NOT"));
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if (!exists) return;
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_UART_CH=0;
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Init_SC16IS752(); // Initialize UART0
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// HK: currently fixed on CH 0
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/*
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if (_nPins>1) {
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_UART_CH=1;
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Init_SC16IS752(); // Initialize UART1
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}
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*/
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if (_deviceState==DEVSTATE_INITIALISING) _deviceState=DEVSTATE_NORMAL;
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_display();
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}
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@ -107,11 +110,40 @@ public:
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if (!DCCWaveform::isRailcomSampleWindow()) return;
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// flip channels each loop
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if (_nPins>1) _UART_CH=_UART_CH?0:1;
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_UART_CH=0; // Fix _UART_CH to 0 for now
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//if (_nPins>1) _UART_CH=_UART_CH?0:1;
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// Read incoming raw Railcom data, and process accordingly
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auto inlength= UART_ReadRegister(REG_RXLV);
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if (inlength==0) return;
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// HK: Read Line Status register first, if bit 7 set we have a FIFO error, need to clear the FIFO and ignore any data and wait for the next cycle
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auto reg_data = UART_ReadRegister(REG_LSR);
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//DIAG(F("Railcom: LSR: %s/%d, Val: 0x%x"), _I2CAddress.toString(), _UART_CH, reg_data);
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if (reg_data & 0x80 ){ // Check bit 7 of LSR, if there is a FIFO error
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DIAG(F("Railcom: LSR: %s/%d, Val: 0x%x"), _I2CAddress.toString(), _UART_CH, reg_data);
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UART_WriteRegister(REG_FCR, 0x07,false);
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}
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auto inlength = UART_ReadRegister(REG_RXLV);
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DIAG(F("Railcom: %s/%d RX Fifo lvl: %d"),_I2CAddress.toString(), _UART_CH, inlength);
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if (inlength==0){
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return;
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} else {
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#ifdef DIAG_I2CRailcom
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DIAG(F("Railcom: %s/%d RX Fifo: %d"),_I2CAddress.toString(), _UART_CH, inlength);
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#endif
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_outbuf[0]=(byte)(REG_RHR << 3 | _UART_CH << 1);
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I2CManager.read(_I2CAddress, _inbuf, inlength, _outbuf, 1);
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#ifdef DIAG_I2CRailcom_data
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DIAG(F("Railcom %s/%d RX FIFO Data"), _I2CAddress.toString(), _UART_CH);
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for (int i = 0; i < inlength; i++){
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DIAG(F("[0x%x]: 0x%x"), i, _inbuf[i]);
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}
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auto locoid=_channelMonitors[_UART_CH].getChannel1Loco(_inbuf);
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DIAG(F("Railcom Channel1=%d"), locoid);
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#endif
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}
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#ifdef DIAG_I2CRailcom
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DIAG(F("Railcom: %s/%d RX Fifo: %d"),_I2CAddress.toString(), _UART_CH, inlength);
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@ -148,7 +180,7 @@ public:
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void _display() override {
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DIAG(F("I2CRailcom Configured on Vpins:%u-%u %S"), _firstVpin, _firstVpin+_nPins-1,
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DIAG(F("I2CRailcom: Configured on Vpins:%u-%u %S"), _firstVpin, _firstVpin+_nPins-1,
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(_deviceState!=DEVSTATE_NORMAL) ? F("OFFLINE") : F(""));
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}
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@ -182,23 +214,51 @@ private:
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static const uint16_t _divisor = (SC16IS752_XTAL_FREQ_RAILCOM / PRESCALER) / (BAUD_RATE * 16);
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void Init_SC16IS752(){
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if (_UART_CH==0) {
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if (_UART_CH==0) { // HK: Currently fixed on ch 0
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// only reset on channel 0}
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UART_WriteRegister(REG_IOCONTROL, 0x08,false); // UART Software reset
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_deviceState=DEVSTATE_INITIALISING; // ignores error during reset which seems normal.
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//_deviceState=DEVSTATE_INITIALISING; // ignores error during reset which seems normal. // HK: this line is moved to below
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auto iocontrol_readback = UART_ReadRegister(REG_IOCONTROL);
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if (iocontrol_readback == 0x00){
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_deviceState=DEVSTATE_INITIALISING;
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DIAG(F("I2CRailcom: %s SRESET readback: 0x%x"),_I2CAddress.toString(), iocontrol_readback);
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} else {
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DIAG(F("I2CRailcom: %s SRESET: 0x%x"),_I2CAddress.toString(), iocontrol_readback);
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}
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}
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UART_WriteRegister(REG_FCR, 0x07,false); // Reset FIFO, clear RX & TX FIFO (write only)
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UART_WriteRegister(REG_MCR, 0x00); // Set MCR to all 0, includes Clock divisor
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UART_WriteRegister(REG_LCR, 0x80); // Divisor latch enabled
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UART_WriteRegister(REG_DLL, _divisor); // Write DLL
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UART_WriteRegister(REG_DLH, (uint8_t)(_divisor >> 8)); // Write DLH
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UART_WriteRegister(REG_LCR, WORD_LEN | STOP_BIT | PARITY_ENA | PARITY_TYPE); // Divisor latch disabled
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UART_WriteRegister(REG_FCR, 0x07,false); // Reset FIFO, clear RX & TX FIFO (write only)
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// HK:
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// You write 0x08 to the IOCONTROL register, setting bit 3 (SRESET), as per datasheet 8.18:
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// "Software Reset. A write to this bit will reset the device. Once the
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// device is reset this bit is automatically set to logic 0"
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// So you can not readback the val you have written as this has changed.
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// I've added an extra UART_ReadRegister(REG_IOCONTROL) and check if the return value is 0x00
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// then set _deviceState=DEVSTATE_INITIALISING;
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// HK: only do clear FIFO at end of Init_SC16IS752
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//UART_WriteRegister(REG_FCR, 0x07,false); // Reset FIFO, clear RX & TX FIFO (write only)
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UART_WriteRegister(REG_MCR, 0x00); // Set MCR to all 0, includes Clock divisor
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//UART_WriteRegister(REG_LCR, 0x80); // Divisor latch enabled
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UART_WriteRegister(REG_LCR, 0x80 | WORD_LEN | STOP_BIT | PARITY_ENA | PARITY_TYPE); // Divisor latch enabled and comm parameters set
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UART_WriteRegister(REG_DLL, (uint8_t)_divisor); // Write DLL
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UART_WriteRegister(REG_DLH, (uint8_t)(_divisor >> 8)); // Write DLH
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auto lcr_readback = UART_ReadRegister(REG_LCR);
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lcr_readback = lcr_readback & 0x7F;
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UART_WriteRegister(REG_LCR, lcr_readback); // Divisor latch disabled
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//UART_WriteRegister(REG_LCR, WORD_LEN | STOP_BIT | PARITY_ENA | PARITY_TYPE); // Divisor latch disabled
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UART_WriteRegister(REG_FCR, 0x07,false); // Reset FIFO, clear RX & TX FIFO (write only)
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// Sent some data to check if UART baudrate is set correctly
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UART_WriteRegister(REG_THR, 9, false);
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DIAG(F("I2CRailcom: UART %s/%d Test TX = 0x09"),_I2CAddress.toString(), _UART_CH);
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if (_deviceState==DEVSTATE_INITIALISING) {
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DIAG(F("UART %d init complete"),_UART_CH);
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DIAG(F("I2CRailcom: UART %d init complete"),_UART_CH);
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}
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}
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@ -211,14 +271,14 @@ private:
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_outbuf[1]=val;
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auto status=I2CManager.write(_I2CAddress, _outbuf, (uint8_t)2);
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if(status!=I2C_STATUS_OK) {
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DIAG(F("I2CRailcom %s/%d write reg=0x%x,data=0x%x,I2Cstate=%d"),
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DIAG(F("I2CRailcom: %s/%d write reg=0x%x,data=0x%x,I2Cstate=%d"),
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_I2CAddress.toString(), _UART_CH, reg, val, status);
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_deviceState=DEVSTATE_FAILED;
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}
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if (readback) { // Read it back to cross check
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auto readback=UART_ReadRegister(reg);
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if (readback!=val) {
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DIAG(F("I2CRailcom %s/%d reg:0x%x write=0x%x read=0x%x"),_I2CAddress.toString(),_UART_CH,reg,val,readback);
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DIAG(F("I2CRailcom readback: %s/%d reg:0x%x write=0x%x read=0x%x"),_I2CAddress.toString(),_UART_CH,reg,val,readback);
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}
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}
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}
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@ -229,7 +289,7 @@ private:
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_inbuf[0]=0;
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auto status=I2CManager.read(_I2CAddress, _inbuf, 1, _outbuf, 1);
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if (status!=I2C_STATUS_OK) {
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DIAG(F("I2CRailcom %s/%d read reg=0x%x,I2Cstate=%d"),
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DIAG(F("I2CRailcom read: %s/%d read reg=0x%x,I2Cstate=%d"),
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_I2CAddress.toString(), _UART_CH, reg, status);
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_deviceState=DEVSTATE_FAILED;
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}
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