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I2C code corrections
Corrections to I2C code: 1) I2CManager_Mega4809.h: Correct bitwise 'and' to logical 'and' - no impact. 2) I2CManager_Wire.h: Ensure that error codes from Wire subsystem are passed back to caller in queueRequest().
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@ -72,7 +72,7 @@ void I2CManagerClass::I2C_sendStart() {
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bytesToReceive = currentRequest->readLen;
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bytesToReceive = currentRequest->readLen;
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// If anything to send, initiate write. Otherwise initiate read.
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// If anything to send, initiate write. Otherwise initiate read.
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if (operation == OPERATION_READ || ((operation == OPERATION_REQUEST) & !bytesToSend))
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if (operation == OPERATION_READ || ((operation == OPERATION_REQUEST) && !bytesToSend))
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TWI0.MADDR = (currentRequest->i2cAddress << 1) | 1;
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TWI0.MADDR = (currentRequest->i2cAddress << 1) | 1;
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else
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else
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TWI0.MADDR = (currentRequest->i2cAddress << 1) | 0;
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TWI0.MADDR = (currentRequest->i2cAddress << 1) | 0;
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@ -94,22 +94,24 @@ uint8_t I2CManagerClass::read(uint8_t address, uint8_t readBuffer[], uint8_t rea
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/***************************************************************************
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/***************************************************************************
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* Function to queue a request block and initiate operations.
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* Function to queue a request block and initiate operations.
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*
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*
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* For the Wire version, this executes synchronously, but the status is
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* For the Wire version, this executes synchronously.
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* returned in the I2CRB as for the asynchronous version.
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* The read/write/write_P functions return I2C_STATUS_OK always, and the
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* completion status of the operation is in the request block, as for
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* the non-blocking version.
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***************************************************************************/
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***************************************************************************/
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void I2CManagerClass::queueRequest(I2CRB *req) {
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void I2CManagerClass::queueRequest(I2CRB *req) {
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switch (req->operation) {
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switch (req->operation) {
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case OPERATION_READ:
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case OPERATION_READ:
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req->status = read(req->i2cAddress, req->readBuffer, req->readLen, NULL, 0, req);
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read(req->i2cAddress, req->readBuffer, req->readLen, NULL, 0, req);
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break;
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break;
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case OPERATION_SEND:
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case OPERATION_SEND:
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req->status = write(req->i2cAddress, req->writeBuffer, req->writeLen, req);
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write(req->i2cAddress, req->writeBuffer, req->writeLen, req);
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break;
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break;
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case OPERATION_SEND_P:
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case OPERATION_SEND_P:
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req->status = write_P(req->i2cAddress, req->writeBuffer, req->writeLen, req);
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write_P(req->i2cAddress, req->writeBuffer, req->writeLen, req);
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break;
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break;
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case OPERATION_REQUEST:
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case OPERATION_REQUEST:
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req->status = read(req->i2cAddress, req->readBuffer, req->readLen, req->writeBuffer, req->writeLen, req);
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read(req->i2cAddress, req->readBuffer, req->readLen, req->writeBuffer, req->writeLen, req);
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break;
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break;
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}
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}
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}
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}
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