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Bit shuffling for function groups

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This commit is contained in:
Harald Barth 2020-10-13 23:08:19 +02:00
parent ac0f7e9356
commit 7dca6db1c5
2 changed files with 11 additions and 11 deletions
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6
DCC.cpp
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@ -456,15 +456,15 @@ bool DCC::issueReminder(int reg) {
break;
case 1: // remind function group 1 (F0-F4)
if (flags & FN_GROUP_1)
setFunctionInternal(loco,0, 128 | ((functions>>1)& 0x0F) | ((functions & 0x01)<<4));
setFunctionInternal(loco,0, 128 | ((functions>>1)& 0x0F) | ((functions & 0x01)<<4)); // 100D DDDD
break;
case 2: // remind function group 2 F5-F8
if (flags & FN_GROUP_2)
setFunctionInternal(loco,0, 176 + ((functions>>5)& 0x0F));
setFunctionInternal(loco,0, 176 | ((functions>>5)& 0x0F)); // 1011 DDDD
break;
case 3: // remind function group 3 F9-F12
if (flags & FN_GROUP_3)
setFunctionInternal(loco,0, 160 + ((functions>>9)& 0x0F));
setFunctionInternal(loco,0, 160 | ((functions>>9)& 0x0F)); // 1010 DDDD
break;
case 4: // remind function group 4 F13-F20
if (flags & FN_GROUP_4)

16
DCCEXParser.cpp
View File

@ -466,19 +466,19 @@ bool DCCEXParser::parsef(Print *stream, int params, int p[])
// convenient for other processing
if (params == 2)
{
byte groupcode = p[1] & 0xE0;
if (groupcode == 0x80)
byte instructionField = p[1] & 0xE0; // 1110 0000
if (instructionField == 0x80) // 1000 0000 Function group 1
{
// Shuffle bits from order F0 F4 F3 F2 F1 to F4 F3 F2 F1 F0
byte normalized = (p[1] << 1 & 0x1e) | (p[1] >> 4 & 0x01);
funcmap(p[0], normalized, 0, 4);
}
else if (groupcode == 0xC0)
else if (instructionField == 0xA0) // 1010 0000 Function group 2
{
funcmap(p[0], p[1], 5, 8);
}
else if (groupcode == 0xA0)
{
funcmap(p[0], p[1], 9, 12);
if (p[1] & 0x10) // 0001 0000 Bit selects F5toF8 / F9toF12
funcmap(p[0], p[1], 5, 8);
else
funcmap(p[0], p[1], 9, 12);
}
}
if (params == 3)