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https://github.com/DCC-EX/CommandStation-EX.git
synced 2024-11-23 08:06:13 +01:00
Ack updates and diags commented out
ACK logic now seems to work.
This commit is contained in:
parent
026ee0b7a8
commit
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23
CVReader.ino
23
CVReader.ino
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@ -2,35 +2,28 @@
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#include "DIAG.h"
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#include "DIAG.h"
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#include "DCCEXParser.h"
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#include "DCCEXParser.h"
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/* this code is here to test the waveforwe generator and reveal the issues involved in programming track operations.
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/* this code is here to test the waveform generator and reveal the issues involved in programming track operations.
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It tests the Waveform genartor and demonstrates how a DCC API function can be simply written
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It tests the Waveform genartor and demonstrates how a DCC API function can be simply written
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to transmit and receive DCC data on the programming track.
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to transmit and receive DCC data on the programming track.
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Once soem CVs have been listed, it then drops into JMRI input moce so you can play.
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Once started, it continues to operate as a DCC++ compaitible command parser
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Important... Config.h contains hardware specific confioguration settings
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Important... Config.h contains hardware specific confioguration settings
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that you will need to check.
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that you will need to check.
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*/
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*/
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void myCallback(int result) {
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DIAG(F("\n Reading CV 1 callback result=%d"),result);
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const int cvnums[] = {1, 2, 3, 4, 5, 8, 17, 18, 19, 21, 22, 29};
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}
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void setup() {
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void setup() {
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Serial.begin(115200);
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Serial.begin(115200);
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DCC::begin();
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DCC::begin();
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// DIAG(F("\n===== CVReader begin ==============================\n"));
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DIAG(F("\n===== CVReader demonstrating DCC::readCV call ==========\n"));
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//
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DCC::readCV(1,myCallback); // myCallback will be called with the result
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// for (byte x = 0; x < sizeof(cvnums) / sizeof(cvnums[0]); x++) {
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DIAG(F("\n===== DCC::readCV has returned, but wont be executed until we are in loop() ======\n"));
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// int value = DCC::readCV(cvnums[x]);
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// DIAG(F("\nCV %d = %d 0x%x %s\n"), cvnums[x], value, value, value >= 0 ? " VERIFIED OK" : "FAILED VERIFICATION");
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// }
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// DIAG(F("\n===== CVReader done ==============================\n"));
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DIAG(F("\nReady for JMRI commands\n"));
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DIAG(F("\nReady for JMRI commands\n"));
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}
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}
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79
DCC.cpp
79
DCC.cpp
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@ -108,14 +108,14 @@ void DCC::writeCVBitMain(int cab, int cv, byte bNum, bool bValue) {
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const ackOp WRITE_BIT0_PROG[] = {
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const ackOp PROGMEM WRITE_BIT0_PROG[] = {
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BASELINE,
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BASELINE,
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W0,WACK,
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W0,WACK,
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V0, WACK, // validate bit is 0
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V0, WACK, // validate bit is 0
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ITC1, // if acked, callback(1)
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ITC1, // if acked, callback(1)
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FAIL // callback (-1)
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FAIL // callback (-1)
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};
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};
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const ackOp WRITE_BIT1_PROG[] = {
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const ackOp PROGMEM WRITE_BIT1_PROG[] = {
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BASELINE,
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BASELINE,
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W1,WACK,
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W1,WACK,
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V1, WACK, // validate bit is 1
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V1, WACK, // validate bit is 1
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@ -124,7 +124,7 @@ const ackOp WRITE_BIT1_PROG[] = {
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};
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};
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const ackOp READ_BIT_PROG[] = {
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const ackOp PROGMEM READ_BIT_PROG[] = {
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BASELINE,
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BASELINE,
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V1, WACK, // validate bit is 1
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V1, WACK, // validate bit is 1
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ITC1, // if acked, callback(1)
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ITC1, // if acked, callback(1)
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@ -133,7 +133,7 @@ const ackOp READ_BIT_PROG[] = {
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FAIL // bit not readable
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FAIL // bit not readable
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};
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};
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const ackOp WRITE_BYTE_PROG[] = {
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const ackOp PROGMEM WRITE_BYTE_PROG[] = {
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BASELINE,
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BASELINE,
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WB,WACK, // Write
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WB,WACK, // Write
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VB,WACK, // validate byte
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VB,WACK, // validate byte
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@ -142,9 +142,9 @@ const ackOp WRITE_BYTE_PROG[] = {
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};
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};
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const ackOp READ_CV_PROG[] = {
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const ackOp PROGMEM READ_CV_PROG[] = {
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BASELINE,
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BASELINE,
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ZERO, //clear bit and byte values
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STARTMERGE, //clear bit and byte values ready for merge pass
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// each bit is validated against 1 (no need for zero validation as entire byte is validated at the end)
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// each bit is validated against 1 (no need for zero validation as entire byte is validated at the end)
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V1, WACK, MERGE, // read and merge bit 0
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V1, WACK, MERGE, // read and merge bit 0
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V1, WACK, MERGE, // read and merge bit 1 etc
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V1, WACK, MERGE, // read and merge bit 1 etc
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@ -277,19 +277,27 @@ void DCC::ackManagerSetup(int cv, byte byteValueOrBitnum, ackOp const program[]
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}
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}
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#define RESET_MIN 8
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const byte RESET_MIN=8; // tuning of reset counter before sending message
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void DCC::ackManagerLoop() {
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void DCC::ackManagerLoop() {
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while (ackManagerProg) {
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while (ackManagerProg) {
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// breaks from this switch will step to next prog entry
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// breaks from this switch will step to next prog entry
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// returns from this switch will stay on same entry (typically WACK waiting and when all finished.)
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// returns from this switch will stay on same entry (typically WACK waiting and when all finished.)
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byte opcode=*ackManagerProg;
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byte opcode=pgm_read_byte_near(ackManagerProg);
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// DIAG(F("apAck %d\n"),opcode);
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int resets=DCCWaveform::progTrack.sentResetsSincePacket;
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int resets=DCCWaveform::progTrack.sentResetsSincePacket;
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int current;
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// DIAG(F("\nopAck %d"),opcode);
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switch (opcode) {
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switch (opcode) {
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case W0: // write bit
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case BASELINE:
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case W1: // write bit
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if (resets<RESET_MIN) return; // try later
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ackTriggerMilliamps=Hardware::getCurrentMilliamps(false) + ACK_MIN_PULSE;
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// DIAG(F("\nBASELINE trigger mA=%d\n"),ackTriggerMilliamps);
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break;
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case W0: // write 0 bit
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case W1: // write 1 bit
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{
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{
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if (resets<RESET_MIN) return; // try later
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if (resets<RESET_MIN) return; // try later
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byte instruction = WRITE_BIT | (opcode==W1 ? BIT_ON : BIT_OFF) | ackManagerBitNum;
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byte instruction = WRITE_BIT | (opcode==W1 ? BIT_ON : BIT_OFF) | ackManagerBitNum;
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@ -297,6 +305,7 @@ void DCC::ackManagerLoop() {
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DCCWaveform::progTrack.schedulePacket(message, sizeof(message), 6);
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DCCWaveform::progTrack.schedulePacket(message, sizeof(message), 6);
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}
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}
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break;
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break;
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case WB: // write byte
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case WB: // write byte
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{
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{
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if (resets<RESET_MIN) return; // try later
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if (resets<RESET_MIN) return; // try later
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@ -304,77 +313,79 @@ void DCC::ackManagerLoop() {
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DCCWaveform::progTrack.schedulePacket(message, sizeof(message), 6);
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DCCWaveform::progTrack.schedulePacket(message, sizeof(message), 6);
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}
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}
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break;
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break;
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case VB: // Issue validate Byte packet
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case VB: // Issue validate Byte packet
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{
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{
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if (resets<RESET_MIN) return; // try later
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if (resets<RESET_MIN) return; // try later
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DIAG(F("\nVB %d %d"),ackManagerCv,ackManagerByte);
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// DIAG(F("\nVB %d %d"),ackManagerCv,ackManagerByte);
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byte message[] = { cv1(VERIFY_BYTE, ackManagerCv), cv2(ackManagerCv), ackManagerByte};
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byte message[] = { cv1(VERIFY_BYTE, ackManagerCv), cv2(ackManagerCv), ackManagerByte};
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DCCWaveform::progTrack.schedulePacket(message, sizeof(message), 5);
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DCCWaveform::progTrack.schedulePacket(message, sizeof(message), 5);
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}
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}
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break;
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break;
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case V0:
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case V0:
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case V1: // Issue validate bit=0 or bit=1 packet
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case V1: // Issue validate bit=0 or bit=1 packet
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{
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{
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if (resets<RESET_MIN) return; // try later
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if (resets<RESET_MIN) return; // try later
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DIAG(F("V%d cv=%d bit=%d"),opcode==V1, ackManagerCv,ackManagerBitNum);
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// DIAG(F("V%d cv=%d bit=%d"),opcode==V1, ackManagerCv,ackManagerBitNum);
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byte instruction = VERIFY_BIT | (opcode==V0?BIT_OFF:BIT_ON) | ackManagerBitNum;
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byte instruction = VERIFY_BIT | (opcode==V0?BIT_OFF:BIT_ON) | ackManagerBitNum;
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byte message[] = {cv1(BIT_MANIPULATE, ackManagerCv), cv2(ackManagerCv), instruction };
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byte message[] = {cv1(BIT_MANIPULATE, ackManagerCv), cv2(ackManagerCv), instruction };
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DCCWaveform::progTrack.schedulePacket(message, sizeof(message), 5);
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DCCWaveform::progTrack.schedulePacket(message, sizeof(message), 5);
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}
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}
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break;
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break;
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case WACK: // wait for ack (or absence of ack)
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{
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if (resets > 6) {
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case WACK: // wait for ack (or absence of ack)
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DIAG(F("\nWACK fail %d\n"), resets);
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if (resets > 6) { //ACK timeout
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// DIAG(F("\nWACK fail %d\n"), resets);
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ackReceived = false;
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ackReceived = false;
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break; // move on to next prog step
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break; // move on to next prog step
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}
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}
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int current=Hardware::getCurrentMilliamps(false);
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current=Hardware::getCurrentMilliamps(false);
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if (current > ackTriggerMilliamps) {
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if (current > ackTriggerMilliamps) { //ACK detected
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DIAG(F("\nWACK ok %dmA, after %d resets\n"), current,resets);
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// DIAG(F("\nACK %dmA, after %d resets\n"), current,resets);
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ackReceived = true;
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ackReceived = true;
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DCCWaveform::progTrack.killRemainingRepeats();
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DCCWaveform::progTrack.killRemainingRepeats();
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break; // move on tho next step
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break; // move on tho next step
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}
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}
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}
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return; // maintain place for next poll cycle.
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return; // check again on next loop cycle.
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case ITC0:
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case ITC0:
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case ITC1: // If True Callback(0 or 1) (if prevous WACK got an ACK)
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case ITC1: // If True Callback(0 or 1) (if prevous WACK got an ACK)
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if (ackReceived) {
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if (ackReceived) {
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ackManagerProg = NULL;
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ackManagerProg = NULL; // all done now
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(ackManagerCallback)(opcode==ITC0?0:1);
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(ackManagerCallback)(opcode==ITC0?0:1);
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return;
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return;
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}
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}
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break;
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break;
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case ITCB: // If True callback(byte)
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case ITCB: // If True callback(byte)
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if (ackReceived) {
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if (ackReceived) {
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ackManagerProg = NULL;
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ackManagerProg = NULL; // all done now
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(ackManagerCallback)(ackManagerByte);
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(ackManagerCallback)(ackManagerByte);
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return;
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return;
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}
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}
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break;
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break;
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case MERGE: // Merge previous wack response with byte value and increment bit number (use for reading CV bytes)
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ackManagerByte <<= 1;
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if (ackReceived) ackManagerByte |= 1;
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ackManagerBitNum--;
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break;
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case FAIL: // callback(-1)
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case FAIL: // callback(-1)
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ackManagerProg = NULL;
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ackManagerProg = NULL;
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(ackManagerCallback)(-1);
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(ackManagerCallback)(-1);
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return;
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return;
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case ZERO:
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case STARTMERGE:
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ackManagerBitNum=7;
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ackManagerBitNum=7;
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ackManagerByte=0;
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ackManagerByte=0;
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break;
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break;
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case BASELINE:
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if (resets<RESET_MIN) return; // try later
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case MERGE: // Merge previous wack response with byte value and update bit number (use for reading CV bytes)
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ackTriggerMilliamps=Hardware::getCurrentMilliamps(false) + ACK_MIN_PULSE;
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ackManagerByte <<= 1;
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DIAG(F("BASELINE mA=%d"),ackTriggerMilliamps);
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if (ackReceived) ackManagerByte |= 1;
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ackManagerBitNum--;
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break;
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break;
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} // end of switch
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} // end of switch
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ackManagerProg++;
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ackManagerProg++;
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}
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}
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12
DCC.h
12
DCC.h
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@ -6,19 +6,19 @@
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typedef void (*ACK_CALLBACK)(int result);
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typedef void (*ACK_CALLBACK)(int result);
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enum ackOp { // Program opcodes for the ack Manager
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enum ackOp { // Program opcodes for the ack Manager
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W0,W1, // issue write bit
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BASELINE, // ensure enough resets sent before starting and obtain baseline current
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WB, // issue write byte
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W0,W1, // issue write bit (0..1) packet
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WB, // issue write byte packet
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VB, // Issue validate Byte packet
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VB, // Issue validate Byte packet
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V0, // Issue validate bit=0 packet
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V0, // Issue validate bit=0 packet
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V1, // issue validate bit=1 packlet
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V1, // issue validate bit=1 packlet
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WACK, // wait for ack (or absence of ack)
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WACK, // wait for ack (or absence of ack)
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ITC1, // If True Callback(1) (if prevous WACK got an ACK)
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ITC1, // If True Callback(1) (if prevous WACK got an ACK)
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ITC0, // If True callback(0);
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ITC0, // If True callback(0);
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ITCB, // IOf True callback(byte)
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ITCB, // If True callback(byte)
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MERGE, // Merge previous wack response with byte value and increment bit number (use for readimng CV bytes)
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FAIL, // callback(-1)
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FAIL, // callback(-1)
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ZERO, // Clear bit and byte
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STARTMERGE, // Clear bit and byte settings ready for merge pass
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BASELINE // ensure enough resets sent before starting and obtain baseline
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MERGE // Merge previous wack response with byte value and decrement bit number (use for readimng CV bytes)
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};
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};
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class DCC {
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class DCC {
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