13 Commits

Author	SHA1	Message	Date
Harald Barth	36cc46e88d	DC frequency dummy functions for odd architectures step #6	2023-12-31 13:52:37 +01:00
pmantoine	3868bb19ac	More uint type fixes	2023-04-08 14:51:10 +08:00
pmantoine	6cc66e26c1	Initial STM32F4xx fast ADC read implementation	2023-01-28 13:58:55 +08:00
pmantoine	1c73a3d7bf	SAMD21 IRQ priority exploration	2022-10-16 16:15:02 +08:00
pmantoine	f39a9d1510	SAMD21 ADCee fixes	2022-10-14 18:55:12 +08:00
Harald Barth	cf89fe2a72	make max ADC value a per platform ADC function	2022-10-12 23:45:10 +02:00
pmantoine	65364212ca	SAMD21 fix analogresolution in ADCee::init	2022-10-12 17:30:20 +08:00
pmantoine	eb766aa27f	Fix to SAMD21 ADCee pin init	2022-10-12 17:12:00 +08:00
pmantoine	4d205be007	SAMD21 ADCee class full implementation	2022-10-12 16:46:37 +08:00
Harald Barth	e0bf978f2b	Change Adc to ADCee because of SAMD conflict	2022-10-04 22:19:51 +02:00
Harald Barth	ee568fcd11	make the Adc class functions the normal code path	2022-10-04 21:55:13 +02:00
Asbelos	9768083bfe	DCCTimer::reset ... Moves CPU dependent reset code into correct place.	2022-07-08 15:01:40 +01:00
pmantoine	6135272c32	SAMD Support Initial Patches	2022-05-17 18:06:08 +08:00