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https://github.com/DCC-EX/CommandStation-EX.git
synced 2024-11-24 16:46:13 +01:00
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dfe3e9d42c
...
7a305e179c
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@ -125,13 +125,8 @@ private:
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|||
// On platforms that scan, it is called from waveform ISR
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// only on a regular basis.
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static void scan();
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#if defined (ARDUINO_ARCH_STM32)
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// bit array of used pins (max 32)
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static uint32_t usedpins;
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#else
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// bit array of used pins (max 16)
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static uint16_t usedpins;
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#endif
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static uint8_t highestPin;
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// cached analog values (malloc:ed to actual number of ADC channels)
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static int *analogvals;
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@ -52,7 +52,7 @@ HardwareSerial Serial6(PA12, PA11); // Rx=PA12, Tx=PA11 -- CN10 pins 12 and 14
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HardwareSerial Serial3(PC11, PC10); // Rx=PC11, Tx=PC10 -- USART3 - F446RE
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HardwareSerial Serial5(PD2, PC12); // Rx=PC7, Tx=PC6 -- UART5 - F446RE
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// On the F446RE, Serial4 and Serial6 also use pins we can't readily map while using the Arduino pins
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#elif defined(ARDUINO_NUCLEO_F412ZG) || defined(ARDUINO_NUCLEO_F413ZH) || defined(ARDUINO_NUCLEO_F429ZI) || defined(ARDUINO_NUCLEO_F446ZE)
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#elif defined(ARDUINO_NUCLEO_F413ZH) || defined(ARDUINO_NUCLEO_F429ZI) || defined(ARDUINO_NUCLEO_F446ZE)|| defined(ARDUINO_NUCLEO_F412ZG)
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// Nucleo-144 boards don't have Serial1 defined by default
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HardwareSerial Serial6(PG9, PG14); // Rx=PG9, Tx=PG14 -- USART6
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// Serial3 is defined to use USART3 by default, but is in fact used as the diag console
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@ -235,19 +235,22 @@ void DCCTimer::reset() {
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while(true) {};
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}
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// Now we can handle more ADCs, maybe this works!
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#define NUM_ADC_INPUTS NUM_ANALOG_INPUTS
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// TODO: may need to use uint32_t on STMF4xx variants with > 16 analog inputs!
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#if defined(ARDUINO_NUCLEO_F446RE) || defined(ARDUINO_NUCLEO_F429ZI) || defined(ARDUINO_NUCLEO_F446ZE)
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#warning STM32 board selected not fully supported - only use ADC1 inputs 0-15 for current sensing!
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#endif
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// For now, define the max of 16 ports - some variants have more, but this not **yet** supported
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#define NUM_ADC_INPUTS 16
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// #define NUM_ADC_INPUTS NUM_ANALOG_INPUTS
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uint32_t ADCee::usedpins = 0; // Max of 32 ADC input channels!
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uint8_t ADCee::highestPin = 0; // Highest pin to scan
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int * ADCee::analogvals = NULL; // Array of analog values last captured
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uint32_t * analogchans = NULL; // Array of channel numbers to be scanned
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// bool adc1configured = false;
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ADC_TypeDef * * adcchans = NULL; // Array to capture which ADC is each input channel on
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uint16_t ADCee::usedpins = 0;
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uint8_t ADCee::highestPin = 0;
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int * ADCee::analogvals = NULL;
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uint32_t * analogchans = NULL;
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bool adc1configured = false;
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int16_t ADCee::ADCmax()
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{
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return 4095;
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int16_t ADCee::ADCmax() {
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return 4095;
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}
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int ADCee::init(uint8_t pin) {
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@ -258,33 +261,11 @@ int ADCee::init(uint8_t pin) {
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return -1024; // some silly value as error
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uint32_t stmgpio = STM_PORT(stmpin); // converts to the GPIO port (16-bits per port group on STM32)
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uint32_t adcchan = STM_PIN_CHANNEL(pinmap_function(stmpin, PinMap_ADC)); // find ADC input channel
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ADC_TypeDef *adc = (ADC_TypeDef *)pinmap_find_peripheral(stmpin, PinMap_ADC); // find which ADC this pin is on ADC1/2/3 etc.
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int adcnum = 1;
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if (adc == ADC1)
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DIAG(F("ADCee::init(): found pin %d on ADC1"), pin);
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// Checking for ADC2 and ADC3 being defined helps cater for more variants later
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#if defined(ADC2)
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else if (adc == ADC2)
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{
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DIAG(F("ADCee::init(): found pin %d on ADC2"), pin);
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adcnum = 2;
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}
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#endif
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#if defined(ADC3)
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else if (adc == ADC3)
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{
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DIAG(F("ADCee::init(): found pin %d on ADC3"), pin);
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adcnum = 3;
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}
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#endif
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else DIAG(F("ADCee::init(): found pin %d on unknown ADC!"), pin);
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uint32_t adcchan = STM_PIN_CHANNEL(pinmap_function(stmpin, PinMap_ADC)); // find ADC channel (only valid for ADC1!)
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GPIO_TypeDef * gpioBase;
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// Port config - find which port we're on and power it up
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GPIO_TypeDef *gpioBase;
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switch (stmgpio)
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{
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// Port config - find which port we're on and power it up
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switch(stmgpio) {
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case 0x00:
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN; //Power up PORTA
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gpioBase = GPIOA;
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@ -297,20 +278,6 @@ int ADCee::init(uint8_t pin) {
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN; //Power up PORTC
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gpioBase = GPIOC;
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break;
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case 0x03:
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIODEN; //Power up PORTD
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gpioBase = GPIOD;
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break;
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case 0x04:
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOEEN; //Power up PORTE
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gpioBase = GPIOE;
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break;
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#if defined(GPIOF)
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case 0x05:
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOFEN; //Power up PORTF
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gpioBase = GPIOF;
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break;
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#endif
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default:
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return -1023; // some silly value as error
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}
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@ -326,33 +293,31 @@ int ADCee::init(uint8_t pin) {
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if (adcchan > 18)
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return -1022; // silly value as error
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if (adcchan < 10)
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adc->SMPR2 |= (0b111 << (adcchan * 3)); // Channel sampling rate 480 cycles
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ADC1->SMPR2 |= (0b111 << (adcchan * 3)); // Channel sampling rate 480 cycles
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else
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adc->SMPR1 |= (0b111 << ((adcchan - 10) * 3)); // Channel sampling rate 480 cycles
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ADC1->SMPR1 |= (0b111 << ((adcchan - 10) * 3)); // Channel sampling rate 480 cycles
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// Read the inital ADC value for this analog input
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adc->SQR3 = adcchan; // 1st conversion in regular sequence
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adc->CR2 |= ADC_CR2_SWSTART; //(1 << 30); // Start 1st conversion SWSTART
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while(!(adc->SR & (1 << 1))); // Wait until conversion is complete
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value = adc->DR; // Read value from register
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ADC1->SQR3 = adcchan; // 1st conversion in regular sequence
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ADC1->CR2 |= (1 << 30); // Start 1st conversion SWSTART
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while(!(ADC1->SR & (1 << 1))); // Wait until conversion is complete
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value = ADC1->DR; // Read value from register
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uint8_t id = pin - PNUM_ANALOG_BASE;
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// if (id > 15) { // today we have not enough bits in the mask to support more
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// return -1021;
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// }
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if (id > 15) { // today we have not enough bits in the mask to support more
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return -1021;
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}
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if (analogvals == NULL) { // allocate analogvals, analogchans and adcchans if this is the first invocation of init
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if (analogvals == NULL) { // allocate analogvals and analogchans if this is the first invocation of init.
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analogvals = (int *)calloc(NUM_ADC_INPUTS+1, sizeof(int));
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analogchans = (uint32_t *)calloc(NUM_ADC_INPUTS+1, sizeof(uint32_t));
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adcchans = (ADC_TypeDef **)calloc(NUM_ADC_INPUTS+1, sizeof(ADC_TypeDef));
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}
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analogvals[id] = value; // Store sampled value
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analogchans[id] = adcchan; // Keep track of which ADC channel is used for reading this pin
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adcchans[id] = adc; // Keep track of which ADC this channel is on
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usedpins |= (1 << id); // This pin is now ready
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usedpins |= (1 << id); // This pin is now ready
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if (id > highestPin) highestPin = id; // Store our highest pin in use
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DIAG(F("ADCee::init(): value=%d, ADC%d: channel=%d, id=%d"), value, adcnum, adcchan, id);
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DIAG(F("ADCee::init(): value=%d, channel=%d, id=%d"), value, adcchan, id);
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return value;
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}
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@ -379,16 +344,13 @@ void ADCee::scan() {
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static uint8_t id = 0; // id and mask are the same thing but it is faster to
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static uint16_t mask = 1; // increment and shift instead to calculate mask from id
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static bool waiting = false;
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static ADC_TypeDef *adc;
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adc = adcchans[id];
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if (waiting)
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{
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if (waiting) {
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// look if we have a result
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if (!(adc->SR & (1 << 1)))
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if (!(ADC1->SR & (1 << 1)))
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return; // no result, continue to wait
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// found value
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analogvals[id] = adc->DR;
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analogvals[id] = ADC1->DR;
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// advance at least one track
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#ifdef DEBUG_ADC
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if (id == 1) TrackManager::track[1]->setBrake(0);
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@ -407,10 +369,9 @@ void ADCee::scan() {
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// look for a valid track to sample or until we are around
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while (true) {
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if (mask & usedpins) {
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// start new ADC aquire on id
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adc = adcchans[id];
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adc->SQR3 = analogchans[id]; // 1st conversion in regular sequence
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adc->CR2 |= (1 << 30); // Start 1st conversion SWSTART
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// start new ADC aquire on id
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ADC1->SQR3 = analogchans[id]; //1st conversion in regular sequence
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ADC1->CR2 |= (1 << 30); //Start 1st conversion SWSTART
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#ifdef DEBUG_ADC
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if (id == 1) TrackManager::track[1]->setBrake(1);
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#endif
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@ -431,83 +392,19 @@ void ADCee::scan() {
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void ADCee::begin() {
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noInterrupts();
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//ADC1 config sequence
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RCC->APB2ENR |= RCC_APB2ENR_ADC1EN; // Enable ADC1 clock
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// TODO: currently defaults to ADC1, may need more to handle other members of STM32F4xx family
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RCC->APB2ENR |= (1 << 8); //Enable ADC1 clock (Bit8)
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// Set ADC prescaler - DIV8 ~ 40ms, DIV6 ~ 30ms, DIV4 ~ 20ms, DIV2 ~ 11ms
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ADC->CCR = (0 << 16); // Set prescaler 0=DIV2, 1=DIV4, 2=DIV6, 3=DIV8
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ADC1->CR1 &= ~(1 << 8); //SCAN mode disabled (Bit8)
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ADC1->CR1 &= ~(3 << 24); //12bit resolution (Bit24,25 0b00)
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ADC1->SQR1 = (1 << 20); //Set number of conversions projected (L[3:0] 0b0001) -> 1 conversion
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// Disable the DMA controller for ADC1
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ADC1->CR2 &= ~ADC_CR2_DMA;
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ADC1->CR2 &= ~(1 << 1); //Single conversion
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ADC1->CR2 &= ~(1 << 11); //Right alignment of data bits bit12....bit0
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ADC1->SQR1 &= ~(0x3FFFFFFF); //Clear whole 1st 30bits in register
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ADC1->SQR2 &= ~(0x3FFFFFFF); //Clear whole 1st 30bits in register
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ADC1->SQR3 &= ~(0x3FFFFFFF); //Clear whole 1st 30bits in register
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ADC1->CR2 |= (1 << 0); // Switch on ADC1
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// Wait for ADC1 to become ready (calibration complete)
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while (!(ADC1->CR2 & ADC_CR2_ADON)) {
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}
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#if defined(ADC2)
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// Enable the ADC2 clock
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RCC->APB2ENR |= RCC_APB2ENR_ADC2EN;
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// Initialize ADC2
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ADC2->CR1 = 0; // Disable all channels
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ADC2->CR2 = 0; // Clear CR2 register
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ADC2->CR1 &= ~(1 << 8); //SCAN mode disabled (Bit8)
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ADC2->CR1 &= ~(3 << 24); //12bit resolution (Bit24,25 0b00)
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ADC2->SQR1 = (1 << 20); //Set number of conversions projected (L[3:0] 0b0001) -> 1 conversion
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ADC2->CR2 &= ~ADC_CR2_DMA; // Disable the DMA controller for ADC3
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ADC2->CR2 &= ~(1 << 1); //Single conversion
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||||
ADC2->CR2 &= ~(1 << 11); //Right alignment of data bits bit12....bit0
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ADC2->SQR1 &= ~(0x3FFFFFFF); //Clear whole 1st 30bits in register
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ADC2->SQR2 &= ~(0x3FFFFFFF); //Clear whole 1st 30bits in register
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ADC2->SQR3 &= ~(0x3FFFFFFF); //Clear whole 1st 30bits in register
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|
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// Enable the ADC
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ADC2->CR2 |= ADC_CR2_ADON;
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||||
|
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// Wait for ADC2 to become ready (calibration complete)
|
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while (!(ADC2->CR2 & ADC_CR2_ADON)) {
|
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}
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|
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// Perform ADC3 calibration (optional)
|
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// ADC3->CR2 |= ADC_CR2_CAL;
|
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// while (ADC3->CR2 & ADC_CR2_CAL) {
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// }
|
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#endif
|
||||
#if defined(ADC3)
|
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// Enable the ADC3 clock
|
||||
RCC->APB2ENR |= RCC_APB2ENR_ADC3EN;
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|
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// Initialize ADC3
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ADC3->CR1 = 0; // Disable all channels
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ADC3->CR2 = 0; // Clear CR2 register
|
||||
|
||||
ADC3->CR1 &= ~(1 << 8); //SCAN mode disabled (Bit8)
|
||||
ADC3->CR1 &= ~(3 << 24); //12bit resolution (Bit24,25 0b00)
|
||||
ADC3->SQR1 = (1 << 20); //Set number of conversions projected (L[3:0] 0b0001) -> 1 conversion
|
||||
ADC3->CR2 &= ~ADC_CR2_DMA; // Disable the DMA controller for ADC3
|
||||
ADC3->CR2 &= ~(1 << 1); //Single conversion
|
||||
ADC3->CR2 &= ~(1 << 11); //Right alignment of data bits bit12....bit0
|
||||
ADC3->SQR1 &= ~(0x3FFFFFFF); //Clear whole 1st 30bits in register
|
||||
ADC3->SQR2 &= ~(0x3FFFFFFF); //Clear whole 1st 30bits in register
|
||||
ADC3->SQR3 &= ~(0x3FFFFFFF); //Clear whole 1st 30bits in register
|
||||
|
||||
// Enable the ADC
|
||||
ADC3->CR2 |= ADC_CR2_ADON;
|
||||
|
||||
// Wait for ADC3 to become ready (calibration complete)
|
||||
while (!(ADC3->CR2 & ADC_CR2_ADON)) {
|
||||
}
|
||||
|
||||
// Perform ADC3 calibration (optional)
|
||||
// ADC3->CR2 |= ADC_CR2_CAL;
|
||||
// while (ADC3->CR2 & ADC_CR2_CAL) {
|
||||
// }
|
||||
#endif
|
||||
interrupts();
|
||||
}
|
||||
#endif
|
||||
|
|
|
@ -37,11 +37,9 @@
|
|||
* I2C bus, or more than one I2C bus on the STM32 architecture
|
||||
*****************************************************************************/
|
||||
#if defined(I2C_USE_INTERRUPTS) && defined(ARDUINO_ARCH_STM32)
|
||||
#if defined(ARDUINO_NUCLEO_F401RE) || defined(ARDUINO_NUCLEO_F411RE) || defined(ARDUINO_NUCLEO_F446RE) \
|
||||
|| defined(ARDUINO_NUCLEO_F412ZG) || defined(ARDUINO_NUCLEO_F413ZH) \
|
||||
|| defined(ARDUINO_NUCLEO_F429ZI) || defined(ARDUINO_NUCLEO_F446ZE)
|
||||
#if defined(ARDUINO_NUCLEO_F411RE) || defined(ARDUINO_NUCLEO_F446RE) || defined(ARDUINO_NUCLEO_F412ZG) || defined(ARDUINO_NUCLEO_F429ZI) || defined(ARDUINO_NUCLEO_F446ZE)
|
||||
// Assume I2C1 for now - default I2C bus on Nucleo-F411RE and likely all Nucleo-64
|
||||
// and Nucleo-144 variants
|
||||
// and Nucleo-144variants
|
||||
I2C_TypeDef *s = I2C1;
|
||||
|
||||
// In init we will ask the STM32 HAL layer for the configured APB1 clock frequency in Hz
|
||||
|
|
|
@ -31,6 +31,7 @@ include_dir = .
|
|||
[env]
|
||||
build_flags = -Wall -Wextra
|
||||
; monitor_filters = time
|
||||
; lib_deps = adafruit/Adafruit ST7735 and ST7789 Library @ ^1.10.0
|
||||
|
||||
[env:samd21-dev-usb]
|
||||
platform = atmelsam
|
||||
|
@ -59,7 +60,7 @@ framework = arduino
|
|||
lib_deps = ${env.lib_deps}
|
||||
monitor_speed = 115200
|
||||
monitor_echo = yes
|
||||
build_flags = -std=c++17
|
||||
build_flags = -std=c++17 ; -DI2C_USE_WIRE -DDIAG_LOOPTIMES -DDIAG_IO
|
||||
|
||||
[env:mega2560-debug]
|
||||
platform = atmelavr
|
||||
|
@ -71,7 +72,7 @@ lib_deps =
|
|||
SPI
|
||||
monitor_speed = 115200
|
||||
monitor_echo = yes
|
||||
build_flags = -DDIAG_IO=2 -DDIAG_LOOPTIMES
|
||||
build_flags = -DDIAG_IO=2 -DDIAG_LOOPTIMES
|
||||
|
||||
[env:mega2560-no-HAL]
|
||||
platform = atmelavr
|
||||
|
@ -83,7 +84,7 @@ lib_deps =
|
|||
SPI
|
||||
monitor_speed = 115200
|
||||
monitor_echo = yes
|
||||
build_flags = -DIO_NO_HAL
|
||||
build_flags = -DIO_NO_HAL
|
||||
|
||||
[env:mega2560-I2C-wire]
|
||||
platform = atmelavr
|
||||
|
@ -107,7 +108,7 @@ lib_deps =
|
|||
SPI
|
||||
monitor_speed = 115200
|
||||
monitor_echo = yes
|
||||
build_flags =
|
||||
build_flags = ; -DDIAG_LOOPTIMES
|
||||
|
||||
[env:mega328]
|
||||
platform = atmelavr
|
||||
|
@ -189,75 +190,10 @@ platform = ststm32
|
|||
board = nucleo_f446re
|
||||
framework = arduino
|
||||
lib_deps = ${env.lib_deps}
|
||||
build_flags = -std=c++17 -Os -g2 -Wunused-variable
|
||||
build_flags = -std=c++17 -Os -g2 -Wunused-variable ; -DDIAG_LOOPTIMES ; -DDIAG_IO
|
||||
monitor_speed = 115200
|
||||
monitor_echo = yes
|
||||
|
||||
; Experimental - no reason this should not work, but not
|
||||
; tested as yet
|
||||
;
|
||||
[env:Nucleo-F401RE]
|
||||
platform = ststm32
|
||||
board = nucleo_f401re
|
||||
framework = arduino
|
||||
lib_deps = ${env.lib_deps}
|
||||
build_flags = -std=c++17 -Os -g2 -Wunused-variable
|
||||
monitor_speed = 115200
|
||||
monitor_echo = yes
|
||||
|
||||
; Commented out by default as the F13ZH has variant files
|
||||
; but NOT the nucleo_f413zh.json file which needs to be
|
||||
; installed before you can let PlatformIO see this
|
||||
;
|
||||
; [env:Nucleo-F413ZH]
|
||||
; platform = ststm32
|
||||
; board = nucleo_f413zh
|
||||
; framework = arduino
|
||||
; lib_deps = ${env.lib_deps}
|
||||
; build_flags = -std=c++17 -Os -g2 -Wunused-variable
|
||||
; monitor_speed = 115200
|
||||
; monitor_echo = yes
|
||||
|
||||
; Commented out by default as the F446ZE needs variant files
|
||||
; installed before you can let PlatformIO see this
|
||||
;
|
||||
; [env:Nucleo-F446ZE]
|
||||
; platform = ststm32
|
||||
; board = nucleo_f446ze
|
||||
; framework = arduino
|
||||
; lib_deps = ${env.lib_deps}
|
||||
; build_flags = -std=c++17 -Os -g2 -Wunused-variable
|
||||
; monitor_speed = 115200
|
||||
; monitor_echo = yes
|
||||
|
||||
; Commented out by default as the F412ZG needs variant files
|
||||
; installed before you can let PlatformIO see this
|
||||
;
|
||||
; [env:Nucleo-F412ZG]
|
||||
; platform = ststm32
|
||||
; board = blah_f412zg
|
||||
; framework = arduino
|
||||
; lib_deps = ${env.lib_deps}
|
||||
; build_flags = -std=c++17 -Os -g2 -Wunused-variable
|
||||
; monitor_speed = 115200
|
||||
; monitor_echo = yes
|
||||
; upload_protocol = stlink
|
||||
|
||||
; Experimental - Ethernet work still in progress
|
||||
;
|
||||
; [env:Nucleo-F429ZI]
|
||||
; platform = ststm32
|
||||
; board = nucleo_f429zi
|
||||
; framework = arduino
|
||||
; lib_deps = ${env.lib_deps}
|
||||
; arduino-libraries/Ethernet @ ^2.0.1
|
||||
; stm32duino/STM32Ethernet @ ^1.3.0
|
||||
; stm32duino/STM32duino LwIP @ ^2.1.2
|
||||
; build_flags = -std=c++17 -Os -g2 -Wunused-variable
|
||||
; monitor_speed = 115200
|
||||
; monitor_echo = yes
|
||||
; upload_protocol = stlink
|
||||
|
||||
[env:Teensy3_2]
|
||||
platform = teensy
|
||||
board = teensy31
|
||||
|
@ -296,4 +232,5 @@ board = teensy41
|
|||
framework = arduino
|
||||
build_flags = -std=c++17 -Os -g2
|
||||
lib_deps = ${env.lib_deps}
|
||||
lib_ignore =
|
||||
lib_ignore =
|
||||
|
||||
|
|
|
@ -3,8 +3,7 @@
|
|||
|
||||
#include "StringFormatter.h"
|
||||
|
||||
#define VERSION "5.1.8"
|
||||
// 5.1.8 - STM32Fxx ADCee extension to support ADCs #2 and #3
|
||||
#define VERSION "5.1.7"
|
||||
// 5.1.7 - Fix turntable broadcasts for non-movement activities and <JP> result
|
||||
// 5.1.6 - STM32F4xx native I2C driver added
|
||||
// 5.1.5 - Added turntable object and EXRAIL commands
|
||||
|
|
Loading…
Reference in New Issue
Block a user