mirror of
https://github.com/DCC-EX/CommandStation-EX.git
synced 2024-12-23 21:01:25 +01:00
300 lines
9.8 KiB
C++
300 lines
9.8 KiB
C++
/*
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* © 2023 Neil McKechnie
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* © 2022 Paul M. Antoine
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* © 2021 Mike S
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* © 2021 Harald Barth
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* © 2021 Fred Decker
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* © 2021 Chris Harlow
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* © 2021 David Cutting
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* All rights reserved.
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*
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* This file is part of Asbelos DCC API
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*
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* This is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* It is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with CommandStation. If not, see <https://www.gnu.org/licenses/>.
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*/
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// ATTENTION: this file only compiles on a STM32 based boards
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// Please refer to DCCTimer.h for general comments about how this class works
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// This is to avoid repetition and duplication.
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#ifdef ARDUINO_ARCH_STM32
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#include "DCCTimer.h"
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#if defined(ARDUINO_NUCLEO_F411RE)
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// Nucleo-64 boards don't have Serial1 defined by default
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HardwareSerial Serial1(PB7, PA15); // Rx=PB7, Tx=PA15 -- CN7 pins 17 and 21 - F411RE
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// Serial2 is defined to use USART2 by default, but is in fact used as the diag console
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// via the debugger on the Nucleo-64. It is therefore unavailable for other DCC-EX uses like WiFi, DFPlayer, etc.
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// Let's define Serial6 as an additional serial port (the only other option for the Nucleo-64s)
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HardwareSerial Serial6(PA12, PA11); // Rx=PA12, Tx=PA11 -- CN10 pins 12 and 14 - F411RE
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#elif defined(ARDUINO_NUCLEO_F446RE)
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// Nucleo-64 boards don't have Serial1 defined by default
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HardwareSerial Serial1(PA10, PB6); // Rx=PA10, Tx=PB6 -- CN10 pins 33 and 17 - F446RE
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// Serial2 is defined to use USART2 by default, but is in fact used as the diag console
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// via the debugger on the Nucleo-64. It is therefore unavailable for other DCC-EX uses like WiFi, DFPlayer, etc.
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#elif defined(ARDUINO_NUCLEO_F412ZG) || defined(ARDUINO_NUCLEO_F429ZI) || defined(ARDUINO_NUCLEO_F446ZE)
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// Nucleo-144 boards don't have Serial1 defined by default
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HardwareSerial Serial1(PG9, PG14); // Rx=PG9, Tx=PG14 -- D0, D1 - F412ZG/F446ZE
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#else
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#warning Serial1 not defined
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#endif
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INTERRUPT_CALLBACK interruptHandler=0;
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// Let's use STM32's timer #2 which supports hardware pulse generation on pins D3 and D6
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// (accurate timing, independent of the latency of interrupt handling).
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// Pin D3 is driven by TIM2 channel 2 and D6 is TIM2 channel 3.
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HardwareTimer timer(TIM2);
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// Timer IRQ handler
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void Timer_Handler() {
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interruptHandler();
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}
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void DCCTimer::begin(INTERRUPT_CALLBACK callback) {
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interruptHandler=callback;
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noInterrupts();
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// adc_set_sample_rate(ADC_SAMPLETIME_480CYCLES);
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timer.pause();
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timer.setPrescaleFactor(1);
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timer.setOverflow(DCC_SIGNAL_TIME, MICROSEC_FORMAT);
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timer.attachInterrupt(Timer_Handler);
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timer.refresh();
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timer.resume();
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interrupts();
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}
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bool DCCTimer::isPWMPin(byte pin) {
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// Timer 2 Channel 2 controls pin D3, and Timer2 Channel 3 controls D6.
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// Enable the appropriate timer channel.
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switch (pin) {
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case 3:
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timer.setMode(2, TIMER_OUTPUT_COMPARE_INACTIVE, D3);
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return true;
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case 6:
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timer.setMode(3, TIMER_OUTPUT_COMPARE_INACTIVE, D6);
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return true;
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default:
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return false;
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}
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}
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void DCCTimer::setPWM(byte pin, bool high) {
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// Set the timer so that, at the next counter overflow, the requested
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// pin state is activated automatically before the interrupt code runs.
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switch (pin) {
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case 3:
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if (high)
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TIM2->CCMR1 = (TIM2->CCMR1 & ~TIM_CCMR1_OC2M_Msk) | TIM_CCMR1_OC2M_0;
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else
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TIM2->CCMR1 = (TIM2->CCMR1 & ~TIM_CCMR1_OC2M_Msk) | TIM_CCMR1_OC2M_1;
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break;
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case 6:
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if (high)
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TIM2->CCMR2 = (TIM2->CCMR2 & ~TIM_CCMR2_OC3M_Msk) | TIM_CCMR2_OC3M_0;
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else
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TIM2->CCMR2 = (TIM2->CCMR2 & ~TIM_CCMR2_OC3M_Msk) | TIM_CCMR2_OC3M_1;
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break;
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}
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}
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void DCCTimer::clearPWM() {
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timer.setMode(2, TIMER_OUTPUT_COMPARE_INACTIVE, NC);
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timer.setMode(3, TIMER_OUTPUT_COMPARE_INACTIVE, NC);
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}
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void DCCTimer::getSimulatedMacAddress(byte mac[6]) {
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volatile uint32_t *serno1 = (volatile uint32_t *)0x1FFF7A10;
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volatile uint32_t *serno2 = (volatile uint32_t *)0x1FFF7A14;
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// volatile uint32_t *serno3 = (volatile uint32_t *)0x1FFF7A18;
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volatile uint32_t m1 = *serno1;
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volatile uint32_t m2 = *serno2;
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mac[0] = m1 >> 8;
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mac[1] = m1 >> 0;
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mac[2] = m2 >> 24;
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mac[3] = m2 >> 16;
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mac[4] = m2 >> 8;
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mac[5] = m2 >> 0;
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}
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volatile int DCCTimer::minimum_free_memory=__INT_MAX__;
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// Return low memory value...
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int DCCTimer::getMinimumFreeMemory() {
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noInterrupts(); // Disable interrupts to get volatile value
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int retval = freeMemory();
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interrupts();
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return retval;
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}
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extern "C" char* sbrk(int incr);
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int DCCTimer::freeMemory() {
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char top;
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return (int)(&top - reinterpret_cast<char *>(sbrk(0)));
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}
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void DCCTimer::reset() {
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__disable_irq();
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NVIC_SystemReset();
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while(true) {};
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}
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#define NUM_ADC_INPUTS NUM_ANALOG_INPUTS
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// TODO: may need to use uint32_t on STMF4xx variants with > 16 analog inputs!
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uint16_t ADCee::usedpins = 0;
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int * ADCee::analogvals = NULL;
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uint32_t * analogchans = NULL;
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bool adc1configured = false;
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int16_t ADCee::ADCmax() {
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return 4095;
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}
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int ADCee::init(uint8_t pin) {
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uint id = pin - A0;
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int value = 0;
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PinName stmpin = digitalPin[analogInputPin[id]];
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uint32_t stmgpio = stmpin / 16; // 16-bits per GPIO port group on STM32
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uint32_t adcchan = STM_PIN_CHANNEL(pinmap_function(stmpin, PinMap_ADC)); // find ADC channel (only valid for ADC1!)
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GPIO_TypeDef * gpioBase;
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// Port config - find which port we're on and power it up
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switch(stmgpio) {
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case 0x00:
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN; //Power up PORTA
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gpioBase = GPIOA;
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break;
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case 0x01:
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN; //Power up PORTB
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gpioBase = GPIOB;
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break;
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case 0x02:
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN; //Power up PORTC
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gpioBase = GPIOC;
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break;
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}
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// Set pin mux mode to analog input
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gpioBase->MODER |= (0b011 << (stmpin << 1)); // Set pin mux to analog mode
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// Set the sampling rate for that analog input
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if (adcchan < 10)
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ADC1->SMPR2 |= (0b111 << (adcchan * 3)); // Channel sampling rate 480 cycles
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else
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ADC1->SMPR1 |= (0b111 << ((adcchan - 10) * 3)); // Channel sampling rate 480 cycles
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// Read the inital ADC value for this analog input
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ADC1->SQR3 = adcchan; // 1st conversion in regular sequence
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ADC1->CR2 |= (1 << 30); // Start 1st conversion SWSTART
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while(!(ADC1->SR & (1 << 1))); // Wait until conversion is complete
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value = ADC1->DR; // Read value from register
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if (analogvals == NULL)
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{
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analogvals = (int *)calloc(NUM_ADC_INPUTS+1, sizeof(int));
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analogchans = (uint32_t *)calloc(NUM_ADC_INPUTS+1, sizeof(uint32_t));
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}
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analogvals[id] = value; // Store sampled value
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analogchans[id] = adcchan; // Keep track of which ADC channel is used for reading this pin
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usedpins |= (1 << id); // This pin is now ready
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return value;
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}
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/*
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* Read function ADCee::read(pin) to get value instead of analogRead(pin)
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*/
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int ADCee::read(uint8_t pin, bool fromISR) {
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uint8_t id = pin - A0;
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// Was this pin initialised yet?
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if ((usedpins & (1<<id) ) == 0)
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return -1023;
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// We do not need to check (analogvals == NULL)
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// because usedpins would still be 0 in that case
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return analogvals[id];
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}
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/*
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* Scan function that is called from interrupt
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*/
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#pragma GCC push_options
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#pragma GCC optimize ("-O3")
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void ADCee::scan() {
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static uint id = 0; // id and mask are the same thing but it is faster to
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static uint16_t mask = 1; // increment and shift instead to calculate mask from id
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static bool waiting = false;
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if (waiting) {
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// look if we have a result
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if (!(ADC1->SR & (1 << 1)))
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return; // no result, continue to wait
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// found value
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analogvals[id] = ADC1->DR;
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// advance at least one track
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// for scope debug TrackManager::track[1]->setBrake(0);
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waiting = false;
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id++;
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mask = mask << 1;
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if (id == NUM_ADC_INPUTS+1) {
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id = 0;
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mask = 1;
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}
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}
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if (!waiting) {
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if (usedpins == 0) // otherwise we would loop forever
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return;
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// look for a valid track to sample or until we are around
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while (true) {
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if (mask & usedpins) {
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// start new ADC aquire on id
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ADC1->SQR3 = analogchans[id]; //1st conversion in regular sequence
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ADC1->CR2 |= (1 << 30); //Start 1st conversion SWSTART
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// for scope debug TrackManager::track[1]->setBrake(1);
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waiting = true;
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return;
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}
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id++;
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mask = mask << 1;
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if (id == NUM_ADC_INPUTS+1) {
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id = 0;
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mask = 1;
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}
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}
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}
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}
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#pragma GCC pop_options
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void ADCee::begin() {
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noInterrupts();
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//ADC1 config sequence
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// TODO: currently defaults to ADC1, may need more to handle other members of STM32F4xx family
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RCC->APB2ENR |= (1 << 8); //Enable ADC1 clock (Bit8)
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// Set ADC prescaler - DIV8 ~ 40ms, DIV6 ~ 30ms, DIV4 ~ 20ms, DIV2 ~ 11ms
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ADC->CCR = (0 << 16); // Set prescaler 0=DIV2, 1=DIV4, 2=DIV6, 3=DIV8
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ADC1->CR1 &= ~(1 << 8); //SCAN mode disabled (Bit8)
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ADC1->CR1 &= ~(3 << 24); //12bit resolution (Bit24,25 0b00)
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ADC1->SQR1 = (1 << 20); //Set number of conversions projected (L[3:0] 0b0001) -> 1 conversion
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ADC1->CR2 &= ~(1 << 1); //Single conversion
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ADC1->CR2 &= ~(1 << 11); //Right alignment of data bits bit12....bit0
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ADC1->SQR1 &= ~(0x3FFFFFFF); //Clear whole 1st 30bits in register
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ADC1->SQR2 &= ~(0x3FFFFFFF); //Clear whole 1st 30bits in register
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ADC1->SQR3 &= ~(0x3FFFFFFF); //Clear whole 1st 30bits in register
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ADC1->CR2 |= (1 << 0); // Switch on ADC1
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interrupts();
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}
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#endif |