mirror of
https://github.com/DCC-EX/CommandStation-EX.git
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6a986d2b0c
Makes it so much easier for novice users as the ArduinoTimers libraray is not yet available from the IDE Library Manager.
130 lines
5.0 KiB
C++
130 lines
5.0 KiB
C++
#ifndef ATSAMC21Timer_h
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#define ATSAMC21Timer_h
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#include "../VirtualTimer.h"
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#include <Arduino.h>
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class Timer : public VirtualTimer
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{
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private:
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int pwmPeriod;
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unsigned long timer_resolution;
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unsigned long lastMicroseconds;
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public:
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void (*isrCallback)();
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Tcc* timer;
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Timer(Tcc* timer) {
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this->timer = timer;
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if(timer == TCC0 || timer == TCC1) {
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timer_resolution = 16777216;
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} else {
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timer_resolution = 65536;
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}
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lastMicroseconds = 0;
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}
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void initialize() {
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if(timer == TCC0 || timer == TCC1) {
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MCLK->APBCMASK.bit.TCC0_ = 1;
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MCLK->APBCMASK.bit.TCC1_ = 1;
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GCLK->GENCTRL[4].reg = ( GCLK_GENCTRL_DIV(2) | GCLK_GENCTRL_SRC_DPLL96M | GCLK_GENCTRL_IDC | GCLK_GENCTRL_GENEN | GCLK_GENCTRL_OE );
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while ((GCLK->SYNCBUSY.bit.GENCTRL >> 4) & 1); // Wait for synchronization
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GCLK->PCHCTRL[28].reg = ( GCLK_PCHCTRL_CHEN | GCLK_PCHCTRL_GEN(4) ); // 28 = TCC0_TCC1
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while ((GCLK->SYNCBUSY.bit.GENCTRL >> 4) & 1); // Wait for synchronization
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}
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else if (timer == TCC2) {
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MCLK->APBCMASK.bit.TCC2_ = 1;
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GCLK->GENCTRL[5].reg = ( GCLK_GENCTRL_DIV(2) | GCLK_GENCTRL_SRC_DPLL96M | GCLK_GENCTRL_IDC | GCLK_GENCTRL_GENEN | GCLK_GENCTRL_OE );
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while ((GCLK->SYNCBUSY.bit.GENCTRL >> 5) & 1); // Wait for synchronization
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GCLK->PCHCTRL[29].reg = ( GCLK_PCHCTRL_CHEN | GCLK_PCHCTRL_GEN(5) ); // 29 = TCC2
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while ((GCLK->SYNCBUSY.bit.GENCTRL >> 5) & 1); // Wait for synchronization
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}
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timer->WAVE.reg = TCC_WAVE_WAVEGEN_NPWM; // Select NPWM as waveform
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while (timer->SYNCBUSY.bit.WAVE); // Wait for synchronization
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}
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void setPeriod(unsigned long microseconds) {
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if(microseconds == lastMicroseconds)
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return;
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lastMicroseconds = microseconds;
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const unsigned long cycles = F_CPU / 1000000 * microseconds; // cycles corresponds to how many clock ticks per microsecond times number of microseconds we want
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timer->CTRLA.bit.PRESCALER = 0;
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if(cycles < timer_resolution) {
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timer->CTRLA.reg |= TCC_CTRLA_PRESCALER(TCC_CTRLA_PRESCALER_DIV1_Val);
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pwmPeriod = cycles;
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} else
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if(cycles < timer_resolution * 2) {
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timer->CTRLA.reg |= TCC_CTRLA_PRESCALER(TCC_CTRLA_PRESCALER_DIV2_Val);
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pwmPeriod = cycles / 2;
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} else
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if(cycles < timer_resolution * 4) {
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timer->CTRLA.reg |= TCC_CTRLA_PRESCALER(TCC_CTRLA_PRESCALER_DIV4_Val);
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pwmPeriod = cycles / 4;
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} else
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if(cycles < timer_resolution * 8) {
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timer->CTRLA.reg |= TCC_CTRLA_PRESCALER(TCC_CTRLA_PRESCALER_DIV8_Val);
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pwmPeriod = cycles / 8;
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} else
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if(cycles < timer_resolution * 16) {
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timer->CTRLA.reg |= TCC_CTRLA_PRESCALER(TCC_CTRLA_PRESCALER_DIV16_Val);
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pwmPeriod = cycles / 16;
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} else
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if(cycles < timer_resolution * 64) {
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timer->CTRLA.reg |= TCC_CTRLA_PRESCALER(TCC_CTRLA_PRESCALER_DIV64_Val);
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pwmPeriod = cycles / 64;
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} else
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if(cycles < timer_resolution * 1024) {
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timer->CTRLA.reg |= TCC_CTRLA_PRESCALER(TCC_CTRLA_PRESCALER_DIV1024_Val);
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pwmPeriod = cycles / 1024;
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}
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timer->PER.reg = pwmPeriod;
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while (timer->SYNCBUSY.bit.PER);
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}
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void start() {
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timer->CTRLA.bit.ENABLE = 1; // Turn on the output
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while (timer->SYNCBUSY.bit.ENABLE); // Wait for synchronization
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}
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void stop() {
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timer->CTRLA.bit.ENABLE = 0; // Turn on the output
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while (timer->SYNCBUSY.bit.ENABLE); // Wait for synchronization
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}
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void attachInterrupt(void (*isr)()) {
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isrCallback = isr; // Store the interrupt callback function
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timer->INTENSET.reg = TCC_INTENSET_OVF; // Set the interrupt to occur on overflow
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if(timer == TCC0) {
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NVIC_EnableIRQ((IRQn_Type) TCC0_IRQn); // Enable the interrupt (clock is still off)
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}
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else if(timer == TCC1) {
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NVIC_EnableIRQ((IRQn_Type) TCC1_IRQn); // Enable the interrupt (clock is still off)
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}
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else if(timer == TCC2) {
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NVIC_EnableIRQ((IRQn_Type) TCC2_IRQn); // Enable the interrupt (clock is still off)
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}
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}
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void detachInterrupt() {
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if(timer == TCC0) {
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NVIC_DisableIRQ((IRQn_Type) TCC0_IRQn); // Disable the interrupt
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}
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else if(timer == TCC1) {
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NVIC_DisableIRQ((IRQn_Type) TCC1_IRQn); // Disable the interrupt
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}
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else if(timer == TCC2) {
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NVIC_DisableIRQ((IRQn_Type) TCC2_IRQn); // Disable the interrupt
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}
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}
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};
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extern Timer TimerA;
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extern Timer TimerB;
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extern Timer TimerC;
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#endif // ATSAMC21Timer_h
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