mirror of
https://github.com/DCC-EX/CommandStation-EX.git
synced 2024-11-22 23:56:13 +01:00
112 lines
3.6 KiB
C
112 lines
3.6 KiB
C
/*
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* AnalogReadFast.h
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*
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* Copyright (C) 2016 Albert van Dalen http://www.avdweb.nl
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*
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* This file is part of CommandStation.
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*
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* CommandStation is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* CommandStation is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with CommandStation. If not, see <https://www.gnu.org/licenses/>.
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*/
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#ifndef COMMANDSTATION_DCC_ANALOGREADFAST_H_
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#define COMMANDSTATION_DCC_ANALOGREADFAST_H_
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#include <Arduino.h>
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int inline analogReadFast(uint8_t ADCpin);
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#if defined(ARDUINO_ARCH_SAMD)
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int inline analogReadFast(uint8_t ADCpin)
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{ ADC->CTRLA.bit.ENABLE = 0; // disable ADC
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while( ADC->STATUS.bit.SYNCBUSY == 1 ); // wait for synchronization
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int CTRLBoriginal = ADC->CTRLB.reg;
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int AVGCTRLoriginal = ADC->AVGCTRL.reg;
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int SAMPCTRLoriginal = ADC->SAMPCTRL.reg;
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ADC->CTRLB.reg &= 0b1111100011111111; // mask PRESCALER bits
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ADC->CTRLB.reg |= ADC_CTRLB_PRESCALER_DIV64; // divide Clock by 64
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ADC->AVGCTRL.reg = ADC_AVGCTRL_SAMPLENUM_1 | // take 1 sample
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ADC_AVGCTRL_ADJRES(0x00ul); // adjusting result by 0
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ADC->SAMPCTRL.reg = 0x00; // sampling Time Length = 0
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ADC->CTRLA.bit.ENABLE = 1; // enable ADC
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while(ADC->STATUS.bit.SYNCBUSY == 1); // wait for synchronization
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int adc = analogRead(ADCpin);
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ADC->CTRLB.reg = CTRLBoriginal;
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ADC->AVGCTRL.reg = AVGCTRLoriginal;
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ADC->SAMPCTRL.reg = SAMPCTRLoriginal;
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return adc;
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}
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#elif defined(ARDUINO_ARCH_SAMC)
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int inline analogReadFast(uint8_t ADCpin)
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{
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Adc* ADC;
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if ( (g_APinDescription[ADCpin].ulPeripheralAttribute & PER_ATTR_ADC_MASK) == PER_ATTR_ADC_STD ) {
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ADC = ADC0;
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} else {
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ADC = ADC1;
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}
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ADC->CTRLA.bit.ENABLE = 0; // disable ADC
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while( ADC->SYNCBUSY.bit.ENABLE == 1 ); // wait for synchronization
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int CTRLBoriginal = ADC->CTRLB.reg;
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int AVGCTRLoriginal = ADC->AVGCTRL.reg;
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int SAMPCTRLoriginal = ADC->SAMPCTRL.reg;
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ADC->CTRLB.reg &= 0b1111100011111111; // mask PRESCALER bits
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ADC->CTRLB.reg |= ADC_CTRLB_PRESCALER_DIV64; // divide Clock by 64
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ADC->AVGCTRL.reg = ADC_AVGCTRL_SAMPLENUM_1 | // take 1 sample
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ADC_AVGCTRL_ADJRES(0x00ul); // adjusting result by 0
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ADC->SAMPCTRL.reg = 0x00; // sampling Time Length = 0
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ADC->CTRLA.bit.ENABLE = 1; // enable ADC
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while(ADC->SYNCBUSY.bit.ENABLE == 1); // wait for synchronization
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int adc = analogRead(ADCpin);
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ADC->CTRLB.reg = CTRLBoriginal;
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ADC->AVGCTRL.reg = AVGCTRLoriginal;
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ADC->SAMPCTRL.reg = SAMPCTRLoriginal;
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return adc;
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}
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#elif defined(ARDUINO_AVR_UNO_WIFI_REV2) || defined(ARDUINO_AVR_NANO_EVERY)
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int inline analogReadFast(uint8_t ADCpin)
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{ byte ADC0CTRLCoriginal = ADC0.CTRLC;
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ADC0.CTRLC = (ADC0CTRLCoriginal & 0b00110000) + 0b01000011;
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int adc = analogRead(ADCpin);
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ADC0.CTRLC = ADC0CTRLCoriginal;
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return adc;
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}
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#else
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int inline analogReadFast(uint8_t ADCpin)
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{ byte ADCSRAoriginal = ADCSRA;
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ADCSRA = (ADCSRA & B11111000) | 4;
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int adc = analogRead(ADCpin);
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ADCSRA = ADCSRAoriginal;
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return adc;
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}
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#endif
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#endif // COMMANDSTATION_DCC_ANALOGREADFAST_H_
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