mirror of
https://github.com/DCC-EX/CommandStation-EX.git
synced 2024-12-24 13:21:23 +01:00
129 lines
4.1 KiB
C++
129 lines
4.1 KiB
C++
/*
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* © 2021 Mike S
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* © 2021 Harald Barth
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* © 2021 Fred Decker
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* © 2021 Chris Harlow
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* © 2021 David Cutting
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* All rights reserved.
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*
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* This file is part of Asbelos DCC API
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*
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* This is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* It is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with CommandStation. If not, see <https://www.gnu.org/licenses/>.
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*/
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/* This timer class is used to manage the single timer required to handle the DCC waveform.
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* All timer access comes through this class so that it can be compiled for
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* various hardware CPU types.
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*
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* DCCEX works on a single timer interrupt at a regular 58uS interval.
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* The DCCWaveform class generates the signals to the motor shield
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* based on this timer.
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*
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* If the motor drivers are BOTH configured to use the correct 2 pins for the architecture,
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* (see isPWMPin() function. )
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* then this allows us to use a hardware driven pin switching arrangement which is
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* achieved by setting the duty cycle of the NEXT clock interrupt to 0% or 100% depending on
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* the required pin state. (see setPWM())
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* This is more accurate than the software interrupt but at the expense of
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* limiting the choice of available pins.
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* Fortunately, a standard motor shield on a Mega uses pins that qualify for PWM...
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* Other shields may be jumpered to PWM pins or run directly using the software interrupt.
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*
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* Because the PWM-based waveform is effectively set half a cycle after the software version,
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* it is not acceptable to drive the two tracks on different methiods or it would cause
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* problems for <1 JOIN> etc.
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*
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*/
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// ATTENTION: this file only compiles on a UnoWifiRev3 or NanoEvery
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// Please refer to DCCTimer.h for general comments about how this class works
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// This is to avoid repetition and duplication.
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#ifdef ARDUINO_ARCH_MEGAAVR
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#include "DCCTimer.h"
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INTERRUPT_CALLBACK interruptHandler=0;
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extern char *__brkval;
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extern char *__malloc_heap_start;
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void DCCTimer::begin(INTERRUPT_CALLBACK callback) {
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interruptHandler=callback;
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noInterrupts();
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ADC0.CTRLC = (ADC0.CTRLC & 0b00110000) | 0b01000011; // speed up analogRead sample time
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TCB0.CTRLB = TCB_CNTMODE_INT_gc & ~TCB_CCMPEN_bm; // timer compare mode with output disabled
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TCB0.CTRLA = TCB_CLKSEL_CLKDIV2_gc; // 8 MHz ~ 0.125 us
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TCB0.CCMP = CLOCK_CYCLES -1; // 1 tick less for timer reset
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TCB0.INTFLAGS = TCB_CAPT_bm; // clear interrupt request flag
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TCB0.INTCTRL = TCB_CAPT_bm; // Enable the interrupt
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TCB0.CNT = 0;
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TCB0.CTRLA |= TCB_ENABLE_bm; // start
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interrupts();
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}
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// ISR called by timer interrupt every 58uS
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ISR(TCB0_INT_vect){
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TCB0.INTFLAGS = TCB_CAPT_bm; // Clear interrupt request flag
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interruptHandler();
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}
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bool DCCTimer::isPWMPin(byte pin) {
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(void) pin;
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return false; // TODO what are the relevant pins?
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}
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void DCCTimer::setPWM(byte pin, bool high) {
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(void) pin;
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(void) high;
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// TODO what are the relevant pins?
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}
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void DCCTimer::clearPWM() {
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// Do nothing unless we implent HA
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}
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void DCCTimer::getSimulatedMacAddress(byte mac[6]) {
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memcpy(mac,(void *) &SIGROW.SERNUM0,6); // serial number
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mac[0] &= 0xFE;
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mac[0] |= 0x02;
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}
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volatile int DCCTimer::minimum_free_memory=__INT_MAX__;
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// Return low memory value...
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int DCCTimer::getMinimumFreeMemory() {
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noInterrupts(); // Disable interrupts to get volatile value
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int retval = minimum_free_memory;
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interrupts();
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return retval;
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}
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extern char *__brkval;
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extern char *__malloc_heap_start;
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int DCCTimer::freeMemory() {
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char top;
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return __brkval ? &top - __brkval : &top - __malloc_heap_start;
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}
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void DCCTimer::reset() {
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CPU_CCP=0xD8;
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WDT.CTRLA=0x4;
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while(true){}
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}
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#endif
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