mirror of
https://github.com/DCC-EX/CommandStation-EX.git
synced 2024-12-24 13:21:23 +01:00
181 lines
6.2 KiB
C++
181 lines
6.2 KiB
C++
/*
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* © 2021, Harald Barth.
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*
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* This file is part of DCC-EX
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*
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* This is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* It is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with CommandStation. If not, see <https://www.gnu.org/licenses/>.
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*/
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#include "config.h"
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#include "defines.h"
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#if defined(ARDUINO_ARCH_ESP32)
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#include "DIAG.h"
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#include "DCCRMT.h"
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#include "DCCWaveform.h" // for MAX_PACKET_SIZE
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#define DATA_LEN(X) ((X)*9+1) // Each byte has one bit extra and we have one EOF marker
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#if ESP_IDF_VERSION < ESP_IDF_VERSION_VAL(4,2,0)
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#error wrong IDF version
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#endif
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void setDCCBit1(rmt_item32_t* item) {
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item->level0 = 1;
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item->duration0 = DCC_1_HALFPERIOD;
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item->level1 = 0;
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item->duration1 = DCC_1_HALFPERIOD;
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}
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void setDCCBit0(rmt_item32_t* item) {
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item->level0 = 1;
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item->duration0 = DCC_0_HALFPERIOD;
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item->level1 = 0;
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item->duration1 = DCC_0_HALFPERIOD;
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}
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// special long zero to trigger scope
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void setDCCBit0Long(rmt_item32_t* item) {
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item->level0 = 1;
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item->duration0 = DCC_0_HALFPERIOD + DCC_0_HALFPERIOD/10;
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item->level1 = 0;
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item->duration1 = DCC_0_HALFPERIOD + DCC_0_HALFPERIOD/10;
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}
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void setEOT(rmt_item32_t* item) {
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item->val = 0;
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}
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void IRAM_ATTR interrupt(rmt_channel_t channel, void *t) {
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RMTChannel *tt = (RMTChannel *)t;
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tt->RMTinterrupt();
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}
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RMTChannel::RMTChannel(byte pin, byte ch, byte plen) {
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// preamble
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preambleLen = plen+2; // plen 1 bits, one 0 bit and one EOF marker
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preamble = (rmt_item32_t*)malloc(preambleLen*sizeof(rmt_item32_t));
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for (byte n=0; n<plen; n++)
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setDCCBit1(preamble + n); // preamble bits
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#ifdef SCOPE
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setDCCBit0Long(preamble + plen); // start of packet 0 bit long version
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#else
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setDCCBit0(preamble + plen); // start of packet 0 bit normal version
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#endif
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setEOT(preamble + plen + 1); // EOT marker
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// idle
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idleLen = 28;
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idle = (rmt_item32_t*)malloc(idleLen*sizeof(rmt_item32_t));
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for (byte n=0; n<8; n++) // 0 to 7
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setDCCBit1(idle + n);
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for (byte n=8; n<18; n++) // 8, 9 to 16, 17
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setDCCBit0(idle + n);
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for (byte n=18; n<26; n++) // 18 to 25
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setDCCBit1(idle + n);
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setDCCBit1(idle + 26); // end bit
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setEOT(idle + 27); // EOT marker
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// data: max packet size today is 5 + checksum
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maxDataLen = DATA_LEN(MAX_PACKET_SIZE);
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data = (rmt_item32_t*)malloc(maxDataLen*sizeof(rmt_item32_t));
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rmt_config_t config;
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// Configure the RMT channel for TX
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bzero(&config, sizeof(rmt_config_t));
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config.rmt_mode = RMT_MODE_TX;
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config.channel = channel = (rmt_channel_t)ch;
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config.clk_div = RMT_CLOCK_DIVIDER;
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config.gpio_num = (gpio_num_t)pin;
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config.mem_block_num = 2; // With longest DCC packet 11 inc checksum (future expansion)
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// number of bits needed is 22preamble + start +
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// 11*9 + extrazero + EOT = 124
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// 2 mem block of 64 RMT items should be enough
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ESP_ERROR_CHECK(rmt_config(&config));
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// NOTE: ESP_INTR_FLAG_IRAM is *NOT* included in this bitmask
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ESP_ERROR_CHECK(rmt_driver_install(config.channel, 0, ESP_INTR_FLAG_LOWMED|ESP_INTR_FLAG_SHARED));
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DIAG(F("Register interrupt on core %d"), xPortGetCoreID());
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ESP_ERROR_CHECK(rmt_set_tx_loop_mode(channel, true));
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rmt_register_tx_end_callback(interrupt, this);
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rmt_set_tx_intr_en(channel, true);
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DIAG(F("Starting channel %d signal generator"), config.channel);
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// send one bit to kickstart the signal, remaining data will come from the
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// packet queue. We intentionally do not wait for the RMT TX complete here.
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//rmt_write_items(channel, preamble, preambleLen, false);
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RMTprefill();
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preambleNext = true;
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dataReady = false;
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RMTinterrupt();
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}
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void RMTChannel::RMTprefill() {
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rmt_fill_tx_items(channel, preamble, preambleLen, 0);
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rmt_fill_tx_items(channel, idle, idleLen, preambleLen-1);
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}
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const byte transmitMask[] = {0x80, 0x40, 0x20, 0x10, 0x08, 0x04, 0x02, 0x01};
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//bool RMTChannel::RMTfillData(const byte buffer[], byte byteCount, byte repeatCount=0) {
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bool RMTChannel::RMTfillData(dccPacket packet) {
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// dataReady: Signals to then interrupt routine. It is set when
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// we have data in the channel buffer which can be copied out
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// to the HW. dataRepeat on the other hand signals back to
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// the caller of this function if the data has been sent enough
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// times (0 to 3 means 1 to 4 times in total).
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if (dataReady == true || dataRepeat > 0) // we have still old work to do
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return false;
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if (DATA_LEN(packet.length) > maxDataLen) { // this would overun our allocated memory for data
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DIAG(F("Can not convert DCC bytes # %d to DCC bits %d, buffer too small"), packet.length, maxDataLen);
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return false; // something very broken, can not convert packet
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}
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byte *buffer = packet.data;
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// convert bytes to RMT stream of "bits"
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byte bitcounter = 0;
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for(byte n=0; n<packet.length; n++) {
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for(byte bit=0; bit<8; bit++) {
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if (buffer[n] & transmitMask[bit])
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setDCCBit1(data + bitcounter++);
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else
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setDCCBit0(data + bitcounter++);
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}
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setDCCBit0(data + bitcounter++); // zero at end of each byte
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}
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setDCCBit1(data + bitcounter-1); // overwrite previous zero bit with one bit
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setEOT(data + bitcounter++); // EOT marker
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dataLen = bitcounter;
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dataReady = true;
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dataRepeat = packet.repeat+1; // repeatCount of 0 means send once
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return true;
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}
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void IRAM_ATTR RMTChannel::RMTinterrupt() {
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//no rmt_tx_start(channel,true) as we run in loop mode
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//preamble is always loaded at beginning of buffer
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if (dataReady) { // if we have new data, fill while preamble is running
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rmt_fill_tx_items(channel, data, dataLen, preambleLen-1);
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dataReady = false;
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}
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if (dataRepeat > 0) // if a repeat count was specified, work on that
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dataRepeat--;
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return;
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}
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#endif //ESP32
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