mirror of
https://github.com/DCC-EX/CommandStation-EX.git
synced 2024-11-30 03:26:13 +01:00
300 lines
9.1 KiB
C++
300 lines
9.1 KiB
C++
/*
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* © 2021, Chris Harlow & David Cutting. All rights reserved.
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*
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* This file is part of Asbelos DCC API
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*
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* This is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* It is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with CommandStation. If not, see <https://www.gnu.org/licenses/>.
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*/
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/* This timer class is used to manage the single timer required to handle the DCC waveform.
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* All timer access comes through this class so that it can be compiled for
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* various hardware CPU types.
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*
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* DCCEX works on a single timer interrupt at a regular 58uS interval.
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* The DCCWaveform class generates the signals to the motor shield
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* based on this timer.
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*
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* If the motor drivers are BOTH configured to use the correct 2 pins for the architecture,
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* (see isPWMPin() function. )
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* then this allows us to use a hardware driven pin switching arrangement which is
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* achieved by setting the duty cycle of the NEXT clock interrupt to 0% or 100% depending on
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* the required pin state. (see setPWM())
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* This is more accurate than the software interrupt but at the expense of
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* limiting the choice of available pins.
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* Fortunately, a standard motor shield on a Mega uses pins that qualify for PWM...
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* Other shields may be jumpered to PWM pins or run directly using the software interrupt.
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*
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* Because the PWM-based waveform is effectively set half a cycle after the software version,
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* it is not acceptable to drive the two tracks on different methiods or it would cause
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* problems for <1 JOIN> etc.
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*
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*/
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#include "DCCTimer.h"
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const int DCC_SIGNAL_TIME=58; // this is the 58uS DCC 1-bit waveform half-cycle
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const long CLOCK_CYCLES=(F_CPU / 1000000 * DCC_SIGNAL_TIME) >>1;
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INTERRUPT_CALLBACK interruptHandler=0;
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#ifdef ARDUINO_ARCH_MEGAAVR
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// Arduino unoWifi Rev2 and nanoEvery architectire
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void DCCTimer::begin(INTERRUPT_CALLBACK callback) {
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interruptHandler=callback;
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noInterrupts();
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ADC0.CTRLC = (ADC0.CTRLC & 0b00110000) | 0b01000011; // speed up analogRead sample time
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TCB0.CTRLB = TCB_CNTMODE_INT_gc & ~TCB_CCMPEN_bm; // timer compare mode with output disabled
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TCB0.CTRLA = TCB_CLKSEL_CLKDIV2_gc; // 8 MHz ~ 0.125 us
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TCB0.CCMP = CLOCK_CYCLES -1; // 1 tick less for timer reset
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TCB0.INTFLAGS = TCB_CAPT_bm; // clear interrupt request flag
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TCB0.INTCTRL = TCB_CAPT_bm; // Enable the interrupt
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TCB0.CNT = 0;
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TCB0.CTRLA |= TCB_ENABLE_bm; // start
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interrupts();
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}
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// ISR called by timer interrupt every 58uS
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ISR(TCB0_INT_vect){
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TCB0.INTFLAGS = TCB_CAPT_bm;
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interruptHandler();
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}
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bool DCCTimer::isPWMPin(byte pin) {
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(void) pin;
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return false; // TODO what are the relevant pins?
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}
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bool DCCTimer::isPWMPin(byte pin) {
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(void) pin;
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return false; // TODO what are the relevant pins?
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}
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void DCCTimer::setPWM(byte pin, bool high) {
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(void) pin;
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(void) high;
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// TODO what are the relevant pins?
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}
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void DCCTimer::getSimulatedMacAddress(byte mac[6]) {
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memcpy(mac,(void *) &SIGROW.SERNUM0,6); // serial number
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mac[0] &= 0xFE;
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mac[0] |= 0x02;
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}
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#elif defined(TEENSYDUINO)
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IntervalTimer myDCCTimer;
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bool interruptFlipflop=false;
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byte railcomPin[2]={0,0];
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enum RAILCOM_NEXT:byte {SKIP,CUT_OUT,CUT_IN);
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RAILCOM_NEXT railcom1Next[]={SKIP,SKIP};
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void DCCTimer::begin(INTERRUPT_CALLBACK callback) {
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interruptHandler=callback;
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myDCCTimer.begin(interruptFast, DCC_SIGNAL_TIME/2);
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}
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// This interrupt happens every 29uS, and alternately calls the DCC waveform
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// or handles any pending Railcom cutout pins.
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void interruptFast() {
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nterruptFlipflop=!interruptFlipflop;
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if (interruptFiliflop) {
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interruptHandler();
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return;
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}
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// Railcom interrupt, half way between DCC interruots
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for (byte channel=0;channel<2;channel++) {
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byte pin=railcomPin[channel;
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if (pin) {
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switch (railcomNext[channel]) {
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case CUT_OUT:
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digitalWrite(pin,HIGH);
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break;
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case CUT_IN:
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digitalWrite(pin,HIGH);
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break;
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case IGNORE: break;
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}
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railcomNext[channel]=IGNORE;
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}
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}
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}
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bool DCCTimer::isPWMPin(byte pin) {
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(void) pin;
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return true; // We are so fast we can pretend we do support this
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}
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bool DCCTimer::isRailcomPin(byte pin) {
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(void) pin;
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if (railcomPin[0]==0) railcomPin[0]=pin;
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else if (railcomPin[1]==0) railcomPin[1]=pin;
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else return false;
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return true; // We are so fast we can pretend we do support this
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}
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void DCCTimer::setPWM(byte pin, bool high) {
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// setting pwm on a railcom pin is deferred to the next railcom interruyupt.
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for (byte channel=0;channel<2;channel++) {
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if (pin==railcomPin[channel]) {
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railcomNext[channel]=high?CUT_OUT:CUT_IN;
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return;
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}
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}
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digitalWrite(pin,high?HIGH:LOW);
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}
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void DCCTimer::getSimulatedMacAddress(byte mac[6]) {
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#if defined(__IMXRT1062__) //Teensy 4.0 and Teensy 4.1
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uint32_t m1 = HW_OCOTP_MAC1;
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uint32_t m2 = HW_OCOTP_MAC0;
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mac[0] = m1 >> 8;
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mac[1] = m1 >> 0;
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mac[2] = m2 >> 24;
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mac[3] = m2 >> 16;
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mac[4] = m2 >> 8;
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mac[5] = m2 >> 0;
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#else
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read_mac(mac);
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#endif
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}
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#if !defined(__IMXRT1062__)
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void DCCTimer::read_mac(byte mac[6]) {
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read(0xe,mac,0);
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read(0xf,mac,3);
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}
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// http://forum.pjrc.com/threads/91-teensy-3-MAC-address
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void DCCTimer::read(uint8_t word, uint8_t *mac, uint8_t offset) {
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FTFL_FCCOB0 = 0x41; // Selects the READONCE command
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FTFL_FCCOB1 = word; // read the given word of read once area
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// launch command and wait until complete
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FTFL_FSTAT = FTFL_FSTAT_CCIF;
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while(!(FTFL_FSTAT & FTFL_FSTAT_CCIF));
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*(mac+offset) = FTFL_FCCOB5; // collect only the top three bytes,
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*(mac+offset+1) = FTFL_FCCOB6; // in the right orientation (big endian).
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*(mac+offset+2) = FTFL_FCCOB7; // Skip FTFL_FCCOB4 as it's always 0.
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}
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#endif
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#else
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// Arduino nano, uno, mega etc
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#if defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
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#define TIMER1_A_PIN 11
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#define TIMER1_B_PIN 12
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#define TIMER1_C_PIN 13
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//railcom timer facility
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#define TIMER4_A_PIN 6
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#define TIMER4_B_PIN 7
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#define TIMER4_C_PIN 8
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#else
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#define TIMER1_A_PIN 9
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#define TIMER1_B_PIN 10
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#endif
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void DCCTimer::begin(INTERRUPT_CALLBACK callback) {
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interruptHandler=callback;
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noInterrupts();
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ADCSRA = (ADCSRA & 0b11111000) | 0b00000100; // speed up analogRead sample time
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TCCR1A = 0;
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ICR1 = CLOCK_CYCLES;
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TCCR1B = _BV(WGM13) | _BV(CS10); // Mode 8, clock select 1
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TIMSK1 = _BV(TOIE1); // Enable Software interrupt
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TCNT1 = 0;
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#if defined(TIMER4_A_PIN)
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//railcom timer facility
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TCCR4A = 0;
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ICR4 = CLOCK_CYCLES;
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TCCR4B = _BV(WGM43) | _BV(CS40); // Mode 8, clock select 1
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TIMSK4 = 0; // Disable Software interrupt
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delayMicroseconds(DCC_SIGNAL_TIME/2);
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TCNT4 = 0; // this timer fires half cycle after Timer 1 (no idea why /4 !)
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#endif
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interrupts();
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}
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// ISR called by timer interrupt every 58uS
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ISR(TIMER1_OVF_vect){ interruptHandler(); }
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// Alternative pin manipulation via PWM control.
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bool DCCTimer::isPWMPin(byte pin) {
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return pin==TIMER1_A_PIN
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|| pin==TIMER1_B_PIN
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#ifdef TIMER1_C_PIN
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|| pin==TIMER1_C_PIN
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#endif
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;
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}
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// Alternative pin manipulation via PWM control.
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bool DCCTimer::isRailcomPin(byte pin) {
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return
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#ifdef TIMER4_A_PIN
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pin==TIMER4_A_PIN ||
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pin==TIMER4_B_PIN ||
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pin==TIMER4_C_PIN ||
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#endif
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false;
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}
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void DCCTimer::setPWM(byte pin, bool high) {
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uint16_t val=high?1024:0;
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if (pin==TIMER1_A_PIN) {
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TCCR1A |= _BV(COM1A1);
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OCR1A= val;
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}
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else if (pin==TIMER1_B_PIN) {
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TCCR1A |= _BV(COM1B1);
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OCR1B= val;
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}
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#ifdef TIMER1_C_PIN
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else if (pin==TIMER1_C_PIN) {
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TCCR1A |= _BV(COM1C1);
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OCR1C= val;
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}
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#endif
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#ifdef TIMER4_A_PIN
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else if (pin==TIMER4_A_PIN) {
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TCCR4A |= _BV(COM4A1);
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OCR4A= val;
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}
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else if (pin==TIMER4_B_PIN) {
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TCCR4A |= _BV(COM4B1);
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OCR4B= val;
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}
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else if (pin==TIMER4_C_PIN) {
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TCCR4A |= _BV(COM4C1);
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OCR4C= val;
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}
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#endif
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}
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#include <avr/boot.h>
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void DCCTimer::getSimulatedMacAddress(byte mac[6]) {
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for (byte i=0; i<6; i++) {
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mac[i]=boot_signature_byte_get(0x0E + i);
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}
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mac[0] &= 0xFE;
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mac[0] |= 0x02;
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}
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#endif
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