mirror of
https://github.com/DCC-EX/CommandStation-EX.git
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570 lines
20 KiB
C++
570 lines
20 KiB
C++
/*
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* © 2023, Neil McKechnie. All rights reserved.
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* © 2022 Paul M Antoine
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*
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* This file is part of CommandStation-EX
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*
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* This is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* It is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with CommandStation. If not, see <https://www.gnu.org/licenses/>.
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*/
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#ifndef I2CMANAGER_H
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#define I2CMANAGER_H
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#include <inttypes.h>
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#include "FSH.h"
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#include "defines.h"
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#include "DIAG.h"
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/*
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* Manager for I2C communications. For portability, it allows use
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* of the Wire class, but also has a native implementation for AVR
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* which supports non-blocking queued I/O requests.
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*
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* Helps to avoid calling Wire.begin() multiple times (which is not
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* entirely benign as it reinitialises).
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*
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* Also helps to avoid the Wire clock from being set, by another device
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* driver, to a speed which is higher than a device supports.
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*
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* Thirdly, it provides a convenient way to check whether there is a
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* device on a particular I2C address.
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*
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* Non-blocking requests are issued by creating an I2C Request Block
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* (I2CRB) which is then added to the I2C manager's queue. The
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* application refers to this block to check for completion of the
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* operation, and for reading completion status.
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*
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* Examples:
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* I2CRB rb;
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* uint8_t status = I2CManager.write(address, buffer, sizeof(buffer), &rb);
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* ...
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* if (!rb.isBusy()) {
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* status = rb.status;
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* // Repeat write
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* I2CManager.queueRequest(&rb);
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* ...
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* status = rb.wait(); // Wait for completion and read status
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* }
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* ...
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* I2CRB rb2;
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* outbuffer[0] = 12; // Register number in I2C device to be read
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* rb2.setRequestParams(address, inBuffer, 1, outBuffer, 1);
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* status = I2CManager.queueRequest(&rb2);
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* if (status == I2C_STATUS_OK) {
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* status = rb2.wait();
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* if (status == I2C_STATUS_OK) {
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* registerValue = inBuffer[0];
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* }
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* }
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* ...
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*
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* Synchronous (blocking) calls are also possible, e.g.
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* status = I2CManager.write(address, buffer, sizeof(buffer));
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*
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* When using non-blocking requests, neither the I2CRB nor the input or output
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* buffers should be modified until the I2CRB is complete (not busy).
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*
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* Timeout monitoring is possible, but requires that the following call is made
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* reasonably frequently in the program's loop() function:
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* I2CManager.loop();
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* So that the application doesn't need to do this explicitly, this call is performed
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* from the I2CRB::isBusy() or I2CRB::wait() functions.
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*
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*/
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/*
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* I2C Multiplexer (e.g. TCA9547, TCA9548)
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*
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* A multiplexer offers a way of extending the address range of I2C devices. For example, GPIO extenders use address range 0x20-0x27
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* to are limited to 8 on a bus. By adding a multiplexer, the limit becomes 8 for each of the multiplexer's 8 sub-buses, i.e. 64.
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* And a single I2C bus can have up to 8 multiplexers, giving up to 64 sub-buses and, in theory, up to 512 I/O extenders; that's
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* as many as 8192 input/output pins!
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* Secondly, the capacitance of the bus is an electrical limiting factor of the length of the bus, speed and number of devices.
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* The multiplexer isolates each sub-bus from the others, and so reduces the capacitance of the bus. For example, with one
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* multiplexer and 64 GPIO extenders, only 9 devices are connected to the bus at any time (multiplexer plus 8 extenders).
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* Thirdly, the multiplexer offers the ability to use mixed-speed devices more effectively, by allowing high-speed devices to be
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* put on a different bus to low-speed devices, enabling the software to switch the I2C speed on-the-fly between I2C transactions.
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*
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*
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* Non-interrupting I2C:
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*
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* Non-blocking I2C may be operated without interrupts (undefine I2C_USE_INTERRUPTS). Instead, the I2C state
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* machine handler, currently invoked from the interrupt service routine, is invoked from the loop() function.
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* The speed at which I2C operations can be performed then becomes highly dependent on the frequency that
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* the loop() function is called, and may be adequate under some circumstances.
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* The advantage of NOT using interrupts is that the impact of I2C upon the DCC waveform (when accurate timing mode isn't in use)
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* becomes almost zero.
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*
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*/
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// Maximum number of retries on an I2C operation.
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// A value of zero will disable retries.
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// Maximum value is 254 (unsigned byte counter)
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// Note that timeout failures are not retried, but any timeout
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// configured applies to each try separately.
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#define MAX_I2C_RETRIES 2
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// Add following line to config.h to enable Wire library instead of native I2C drivers
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//#define I2C_USE_WIRE
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// Add following line to config.h to disable the use of interrupts by the native I2C drivers.
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//#define I2C_NO_INTERRUPTS
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// Default to use interrupts within the native I2C drivers.
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#ifndef I2C_NO_INTERRUPTS
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#define I2C_USE_INTERRUPTS
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#endif
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// I2C Extended Address support I2C Multiplexers and allows various properties to be
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// associated with an I2C address such as the MUX and SubBus. In the future, this
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// may be extended to include multiple buses, and other features.
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// Uncomment to enable extended address.
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//
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//#define I2C_EXTENDED_ADDRESS
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/////////////////////////////////////////////////////////////////////////////////////
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// Extended I2C Address type to facilitate extended I2C addresses including
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// I2C multiplexer support.
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/////////////////////////////////////////////////////////////////////////////////////
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// Currently only one bus supported, and one instance of I2CManager to handle it.
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enum I2CBus : uint8_t {
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I2CBus_0 = 0,
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};
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// Currently I2CAddress supports one I2C bus, with up to eight
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// multipexers (MUX) attached. Each MUX can have up to eight sub-buses.
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enum I2CMux : uint8_t {
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I2CMux_0 = 0,
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I2CMux_1 = 1,
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I2CMux_2 = 2,
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I2CMux_3 = 3,
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I2CMux_4 = 4,
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I2CMux_5 = 5,
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I2CMux_6 = 6,
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I2CMux_7 = 7,
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I2CMux_None = 255, // Address doesn't need mux switching
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};
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enum I2CSubBus : uint8_t {
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SubBus_0 = 0, // Enable individual sub-buses...
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SubBus_1 = 1,
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#if !defined(I2CMUX_PCA9542)
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SubBus_2 = 2,
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SubBus_3 = 3,
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#if !defined(I2CMUX_PCA9544)
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SubBus_4 = 4,
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SubBus_5 = 5,
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SubBus_6 = 6,
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SubBus_7 = 7,
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#endif
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#endif
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SubBus_No, // Number of subbuses (highest + 1)
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SubBus_None = 254, // Disable all sub-buses on selected mux
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SubBus_All = 255, // Enable all sub-buses (not supported by some multiplexers)
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};
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// Type to hold I2C address
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#if defined(I2C_EXTENDED_ADDRESS)
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// First MUX address (they range between 0x70-0x77).
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#define I2C_MUX_BASE_ADDRESS 0x70
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// Currently I2C address supports one I2C bus, with up to eight
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// multiplexers (MUX) attached. Each MUX can have up to eight sub-buses.
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// This structure could be extended in the future (if there is a need)
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// to support 10-bit I2C addresses, different I2C clock speed for each
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// sub-bus, multiple I2C buses, and other features not yet thought of.
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struct I2CAddress {
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private:
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// Fields
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I2CBus _busNumber;
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I2CMux _muxNumber;
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I2CSubBus _subBus;
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uint8_t _deviceAddress;
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static char addressBuffer[];
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public:
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// Constructors
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// For I2CAddress "{I2CBus_0, Mux_0, SubBus_0, 0x23}" syntax.
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I2CAddress(const I2CBus busNumber, const I2CMux muxNumber, const I2CSubBus subBus, const uint8_t deviceAddress) {
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_busNumber = busNumber;
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_muxNumber = muxNumber;
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_subBus = subBus;
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_deviceAddress = deviceAddress;
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}
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// Basic constructor
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I2CAddress() : I2CAddress(I2CMux_None, SubBus_None, 0) {}
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// For I2CAddress "{Mux_0, SubBus_0, 0x23}" syntax.
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I2CAddress(const I2CMux muxNumber, const I2CSubBus subBus, const uint8_t deviceAddress) :
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I2CAddress(I2CBus_0, muxNumber, subBus, deviceAddress) {}
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// For I2CAddress in form "{SubBus_0, 0x23}" - assume Mux0 (0x70)
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I2CAddress(I2CSubBus subBus, uint8_t deviceAddress) :
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I2CAddress(I2CMux_0, subBus, deviceAddress) {}
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// Conversion from uint8_t to I2CAddress
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// For I2CAddress in form "0x23"
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// (device assumed to be on the main I2C bus).
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I2CAddress(const uint8_t deviceAddress) :
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I2CAddress(I2CMux_None, SubBus_None, deviceAddress) {}
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// Conversion from uint8_t to I2CAddress
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// For I2CAddress in form "{I2CBus_1, 0x23}"
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// (device not connected via multiplexer).
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I2CAddress(const I2CBus bus, const uint8_t deviceAddress) :
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I2CAddress(bus, I2CMux_None, SubBus_None, deviceAddress) {}
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// For I2CAddress in form "{I2CMux_0, SubBus_0}" (mux selector)
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I2CAddress(const I2CMux muxNumber, const I2CSubBus subBus) :
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I2CAddress(muxNumber, subBus, 0x00) {}
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// For I2CAddress in form "{i2cAddress, deviceAddress}"
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// where deviceAddress is to be on the same subbus as i2cAddress.
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I2CAddress(I2CAddress firstAddress, uint8_t newDeviceAddress) :
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I2CAddress(firstAddress._muxNumber, firstAddress._subBus, newDeviceAddress) {}
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// Conversion operator from I2CAddress to uint8_t
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// For "uint8_t address = i2cAddress;" syntax
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// (device assumed to be on the main I2C bus or on a currently selected subbus.
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operator uint8_t () const { return _deviceAddress; }
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// Conversion from I2CAddress to char* (uses static storage so only
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// one conversion can be done at a time). So don't call it twice in a
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// single DIAG statement for example.
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const char* toString() {
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char *ptr = addressBuffer;
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if (_muxNumber != I2CMux_None) {
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strcpy_P(ptr, (const char*)F("{I2CMux_"));
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ptr += 8;
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*ptr++ = '0' + _muxNumber;
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strcpy_P(ptr, (const char*)F(",Subbus_"));
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ptr += 8;
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if (_subBus == SubBus_None) {
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strcpy_P(ptr, (const char*)F("None"));
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ptr += 4;
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} else if (_subBus == SubBus_All) {
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strcpy_P(ptr, (const char*)F("All"));
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ptr += 3;
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} else
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*ptr++ = '0' + _subBus;
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*ptr++ = ',';
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}
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toHex(_deviceAddress, ptr);
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ptr += 4;
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if (_muxNumber != I2CMux_None)
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*ptr++ = '}';
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*ptr = 0; // terminate string
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return addressBuffer;
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}
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// Comparison operator
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int operator == (I2CAddress &a) const {
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if (_deviceAddress != a._deviceAddress)
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return false; // Different device address so no match
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if (_muxNumber == I2CMux_None || a._muxNumber == I2CMux_None)
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return true; // Same device address, one or other on main bus
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if (_subBus == SubBus_None || a._subBus == SubBus_None)
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return true; // Same device address, one or other on main bus
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if (_muxNumber != a._muxNumber)
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return false; // Connected to a subbus on a different mux
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if (_subBus != a._subBus)
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return false; // different subbus
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return true; // Same address on same mux and same subbus
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}
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// Field accessors
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I2CMux muxNumber() { return _muxNumber; }
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I2CSubBus subBus() { return _subBus; }
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uint8_t deviceAddress() { return _deviceAddress; }
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private:
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// Helper function for converting byte to four-character hex string (e.g. 0x23).
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void toHex(const uint8_t value, char *buffer);
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};
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#else
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struct I2CAddress {
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private:
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uint8_t _deviceAddress;
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static char addressBuffer[];
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public:
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// Constructors
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I2CAddress(const uint8_t deviceAddress) {
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_deviceAddress = deviceAddress;
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}
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I2CAddress(I2CMux, I2CSubBus, const uint8_t deviceAddress) {
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addressWarning();
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_deviceAddress = deviceAddress;
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}
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I2CAddress(I2CSubBus, const uint8_t deviceAddress) {
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addressWarning();
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_deviceAddress = deviceAddress;
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}
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// Basic constructor
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I2CAddress() : I2CAddress(0) {}
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// Conversion operator from I2CAddress to uint8_t
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// For "uint8_t address = i2cAddress;" syntax
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operator uint8_t () const { return _deviceAddress; }
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// Conversion from I2CAddress to char* (uses static storage so only
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// one conversion can be done at a time). So don't call it twice in a
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// single DIAG statement for example.
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const char* toString () {
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char *ptr = addressBuffer;
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// Just display hex value, two digits.
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toHex(_deviceAddress, ptr);
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ptr += 4;
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*ptr = 0; // terminate string
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return addressBuffer;
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}
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// Comparison operator
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int operator == (I2CAddress &a) const {
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if (_deviceAddress != a._deviceAddress)
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return false; // Different device address so no match
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return true; // Same address on same mux and same subbus
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}
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private:
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// Helper function for converting byte to four-character hex string (e.g. 0x23).
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void toHex(const uint8_t value, char *buffer);
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void addressWarning() {
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if (!_addressWarningDone) {
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DIAG(F("WARNIING: Extended I2C address used but not supported in this configuration"));
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_addressWarningDone = true;
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}
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}
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static bool _addressWarningDone;
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};
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#endif // I2C_EXTENDED_ADDRESS
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// Status codes for I2CRB structures.
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enum : uint8_t {
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// Codes used by Wire and by native drivers
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I2C_STATUS_OK=0,
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I2C_STATUS_TRUNCATED=1,
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I2C_STATUS_NEGATIVE_ACKNOWLEDGE=2,
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I2C_STATUS_TRANSMIT_ERROR=3,
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I2C_STATUS_TIMEOUT=5,
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// Code used by Wire only
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I2C_STATUS_OTHER_TWI_ERROR=4, // catch-all error
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// Codes used by native drivers only
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I2C_STATUS_ARBITRATION_LOST=6,
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I2C_STATUS_BUS_ERROR=7,
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I2C_STATUS_UNEXPECTED_ERROR=8,
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I2C_STATUS_PENDING=253,
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};
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// Status codes for the state machine (not returned to caller).
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enum : uint8_t {
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I2C_STATE_ACTIVE=253,
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I2C_STATE_FREE=254,
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I2C_STATE_CLOSING=255,
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I2C_STATE_COMPLETED=252,
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};
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typedef enum : uint8_t
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{
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OPERATION_READ = 1,
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OPERATION_REQUEST = 2,
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OPERATION_SEND = 3,
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OPERATION_SEND_P = 4,
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OPERATION_NORETRY = 0x80, // OR with operation to suppress retries.
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OPERATION_MASK = 0x7f, // mask for extracting the operation code
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} OperationEnum;
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// Default I2C frequency
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#ifndef I2C_FREQ
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#define I2C_FREQ 400000L
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#endif
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// Class defining a request context for an I2C operation.
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class I2CRB {
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public:
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volatile uint8_t status; // Completion status, or pending flag (updated from IRC)
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volatile uint8_t nBytes; // Number of bytes read (updated from IRC)
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inline I2CRB() { status = I2C_STATUS_OK; };
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uint8_t wait();
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bool isBusy();
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void setReadParams(I2CAddress i2cAddress, uint8_t *readBuffer, uint8_t readLen);
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void setRequestParams(I2CAddress i2cAddress, uint8_t *readBuffer, uint8_t readLen, const uint8_t *writeBuffer, uint8_t writeLen);
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void setWriteParams(I2CAddress i2cAddress, const uint8_t *writeBuffer, uint8_t writeLen);
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void suppressRetries(bool suppress);
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uint8_t writeLen;
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uint8_t readLen;
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uint8_t operation;
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I2CAddress i2cAddress;
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uint8_t *readBuffer;
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const uint8_t *writeBuffer;
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#if !defined(I2C_USE_WIRE)
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I2CRB *nextRequest; // Used by non-blocking devices for I2CRB queue management.
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#endif
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};
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// I2C Manager
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class I2CManagerClass {
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public:
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// If not already initialised, initialise I2C (wire).
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void begin(void);
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// Set clock speed to the lowest requested one.
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void setClock(uint32_t speed);
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// Force clock speed
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void forceClock(uint32_t speed);
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// setTimeout sets the timout value for I2C transactions (milliseconds).
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void setTimeout(unsigned long);
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// Check if specified I2C address is responding.
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uint8_t checkAddress(I2CAddress address);
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inline bool exists(I2CAddress address) {
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return checkAddress(address)==I2C_STATUS_OK;
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}
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// Select/deselect Mux Sub-Bus (if using legacy addresses, just checks address)
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// E.g. muxSelectSubBus({I2CMux_0, SubBus_3});
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uint8_t muxSelectSubBus(I2CAddress address) {
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return checkAddress(address);
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}
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// Write a complete transmission to I2C from an array in RAM
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uint8_t write(I2CAddress address, const uint8_t buffer[], uint8_t size);
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uint8_t write(I2CAddress address, const uint8_t buffer[], uint8_t size, I2CRB *rb);
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// Write a complete transmission to I2C from an array in Flash
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uint8_t write_P(I2CAddress address, const uint8_t buffer[], uint8_t size);
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uint8_t write_P(I2CAddress address, const uint8_t buffer[], uint8_t size, I2CRB *rb);
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// Write a transmission to I2C from a list of bytes.
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uint8_t write(I2CAddress address, uint8_t nBytes, ...);
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// Write a command from an array in RAM and read response
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uint8_t read(I2CAddress address, uint8_t readBuffer[], uint8_t readSize,
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const uint8_t writeBuffer[]=NULL, uint8_t writeSize=0);
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uint8_t read(I2CAddress address, uint8_t readBuffer[], uint8_t readSize,
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const uint8_t writeBuffer[], uint8_t writeSize, I2CRB *rb);
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// Write a command from an arbitrary list of bytes and read response
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uint8_t read(I2CAddress address, uint8_t readBuffer[], uint8_t readSize,
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uint8_t writeSize, ...);
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void queueRequest(I2CRB *req);
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// Function to abort long-running operations.
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void checkForTimeout();
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// Loop method
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void loop();
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// Expand error codes into text. Note that they are in flash so
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// need to be printed using FSH.
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static const FSH *getErrorMessage(uint8_t status);
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private:
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bool _beginCompleted = false;
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bool _clockSpeedFixed = false;
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uint8_t retryCounter; // Count of retries
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// Clock speed must be no higher than 400kHz on AVR. Higher is possible on 4809, SAMD
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// and STM32 but most popular I2C devices are 400kHz so in practice the higher speeds
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// will not be useful. The speed can be overridden by I2CManager::forceClock().
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uint32_t _clockSpeed = I2C_FREQ;
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// Default timeout 100ms on I2C request block completion.
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// A full 32-byte transmission takes about 8ms at 100kHz,
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// so this value allows lots of headroom.
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// It can be modified by calling I2CManager.setTimeout() function.
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// When retries are enabled, the timeout applies to each
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// try, and failure from timeout does not get retried.
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// A value of 0 means disable timeout monitoring.
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unsigned long _timeout = 100000UL;
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// Finish off request block by waiting for completion and posting status.
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uint8_t finishRB(I2CRB *rb, uint8_t status);
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|
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void _initialise();
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void _setClock(unsigned long);
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#if defined(I2C_EXTENDED_ADDRESS)
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// Count of I2C multiplexers found when initialising. If there is only one
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// MUX then the subbus does not need de-selecting after use; however, if there
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// are two or more, then the subbus must be deselected to avoid multiple
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// sub-bus legs on different multiplexers being accessible simultaneously.
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private:
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uint8_t _muxCount = 0;
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public:
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|
uint8_t getMuxCount() { return _muxCount; }
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#endif
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|
|
|
#if !defined(I2C_USE_WIRE)
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// I2CRB structs are queued on the following two links.
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|
// If there are no requests, both are NULL.
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// If there is only one request, then queueHead and queueTail both point to it.
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// Otherwise, queueHead is the pointer to the first request in the queue and
|
|
// queueTail is the pointer to the last request in the queue.
|
|
// Within the queue, each request's nextRequest field points to the
|
|
// next request, or NULL.
|
|
// Mark volatile as they are updated by IRC and read/written elsewhere.
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|
private:
|
|
I2CRB * volatile queueHead = NULL;
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|
I2CRB * volatile queueTail = NULL;
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|
|
|
// State is set to I2C_STATE_FREE when the interrupt handler has finished
|
|
// the current request and is ready to complete.
|
|
uint8_t state = I2C_STATE_FREE;
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|
|
|
// CompletionStatus may be set by the interrupt handler at any time but is
|
|
// not written to the I2CRB until the state is I2C_STATE_FREE.
|
|
uint8_t completionStatus = I2C_STATUS_OK;
|
|
uint8_t overallStatus = I2C_STATUS_OK;
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|
|
|
I2CRB * currentRequest = NULL;
|
|
uint8_t txCount = 0;
|
|
uint8_t rxCount = 0;
|
|
uint8_t bytesToSend = 0;
|
|
uint8_t bytesToReceive = 0;
|
|
uint8_t operation = 0;
|
|
unsigned long startTime = 0;
|
|
uint8_t muxPhase = 0;
|
|
uint8_t muxAddress = 0;
|
|
uint8_t muxData[1];
|
|
uint8_t deviceAddress;
|
|
const uint8_t *sendBuffer;
|
|
uint8_t *receiveBuffer;
|
|
|
|
volatile uint32_t pendingClockSpeed = 0;
|
|
|
|
void startTransaction();
|
|
|
|
// Low-level hardware manipulation functions.
|
|
void I2C_init();
|
|
void I2C_setClock(unsigned long i2cClockSpeed);
|
|
void I2C_handleInterrupt();
|
|
void I2C_sendStart();
|
|
void I2C_sendStop();
|
|
void I2C_close();
|
|
|
|
public:
|
|
// handleInterrupt needs to be public to be called from the ISR function!
|
|
void handleInterrupt();
|
|
#endif
|
|
|
|
|
|
};
|
|
|
|
// Pointer to class instance (Note: if there is more than one bus, each will have
|
|
// its own instance of I2CManager, selected by the queueRequest function from
|
|
// the I2CBus field within the request block's I2CAddress).
|
|
extern I2CManagerClass I2CManager;
|
|
|
|
|
|
#endif
|