From 226f0b32ba0c0fd2e8328397bb0ad42818d5cf82 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Daniele=20Vigan=C3=B2?= Date: Thu, 8 Jan 2026 13:20:34 +0100 Subject: [PATCH] Fix order in the DCC interfaces --- ram/ram/settings.py | 4 ++-- ...y => 0040_alter_rollingstock_decoder_interface_order.py} | 6 +++--- 2 files changed, 5 insertions(+), 5 deletions(-) rename ram/roster/migrations/{0040_alter_rollingstock_decoder_interface.py => 0040_alter_rollingstock_decoder_interface_order.py} (88%) diff --git a/ram/ram/settings.py b/ram/ram/settings.py index 6292e15..6837962 100644 --- a/ram/ram/settings.py +++ b/ram/ram/settings.py @@ -151,10 +151,10 @@ DECODER_INTERFACES = [ (0, "Built-in"), (1, "NEM651"), (2, "NEM652"), - (3, "NEM658 (Plux22)"), + (3, "NEM658 (Plux16)"), + (6, "NEM658 (Plux22)"), (4, "NEM660 (21MTC)"), (5, "NEM662 (Next18/Next18S)"), - (3, "NEM658 (Plux16)"), ] MANUFACTURER_TYPES = [ diff --git a/ram/roster/migrations/0040_alter_rollingstock_decoder_interface.py b/ram/roster/migrations/0040_alter_rollingstock_decoder_interface_order.py similarity index 88% rename from ram/roster/migrations/0040_alter_rollingstock_decoder_interface.py rename to ram/roster/migrations/0040_alter_rollingstock_decoder_interface_order.py index 44c65a5..00646ee 100644 --- a/ram/roster/migrations/0040_alter_rollingstock_decoder_interface.py +++ b/ram/roster/migrations/0040_alter_rollingstock_decoder_interface_order.py @@ -1,4 +1,4 @@ -# Generated by Django 6.0 on 2026-01-08 11:14 +# Generated by Django 6.0 on 2026-01-08 12:16 from django.db import migrations, models @@ -19,10 +19,10 @@ class Migration(migrations.Migration): (0, "Built-in"), (1, "NEM651"), (2, "NEM652"), - (3, "NEM658 (Plux22)"), + (3, "NEM658 (Plux16)"), + (6, "NEM658 (Plux22)"), (4, "NEM660 (21MTC)"), (5, "NEM662 (Next18/Next18S)"), - (3, "NEM658 (Plux16)"), ], null=True, ),