mirror of
https://github.com/DCC-EX/CommandStation-EX.git
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951 lines
17 KiB
C
951 lines
17 KiB
C
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/****************************************************************************************************************************
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timer.c
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For Portenta_H7 boards
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Written by Khoi Hoang
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Built by Khoi Hoang https://github.com/khoih-prog/Portenta_H7_TimerInterrupt
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Licensed under MIT license
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Now even you use all these new 16 ISR-based timers,with their maximum interval practically unlimited (limited only by
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unsigned long miliseconds), you just consume only one Portenta_H7 STM32 timer and avoid conflicting with other cores' tasks.
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The accuracy is nearly perfect compared to software timers. The most important feature is they're ISR-based timers
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Therefore, their executions are not blocked by bad-behaving functions / tasks.
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This important feature is absolutely necessary for mission-critical tasks.
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Version: 1.4.0
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Version Modified By Date Comments
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------- ----------- ---------- -----------
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1.2.1 K.Hoang 15/09/2021 Initial coding for Portenta_H7
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1.3.0 K.Hoang 17/09/2021 Add PWM features and examples
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1.3.1 K.Hoang 21/09/2021 Fix warnings in PWM examples
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1.4.0 K.Hoang 22/01/2022 Fix `multiple-definitions` linker error. Fix bug
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*****************************************************************************************************************************/
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// Modified from stm32 core v2.0.0
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/*
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*******************************************************************************
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Copyright (c) 2019, STMicroelectronics
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All rights reserved.
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This software component is licensed by ST under BSD 3-Clause license,
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the "License"; You may not use this file except in compliance with the
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License. You may obtain a copy of the License at:
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opensource.org/licenses/BSD-3-Clause
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*******************************************************************************
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*/
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#if defined(ARDUINO_GIGA)
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#include "Gigatimer.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if defined(HAL_TIM_MODULE_ENABLED) && !defined(HAL_TIM_MODULE_ONLY)
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/* Private Functions */
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/* Aim of the function is to get _timerObj pointer using htim pointer */
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/* Highly inspired from magical linux kernel's "container_of" */
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/* (which was not directly used since not compatible with IAR toolchain) */
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timerObj_t *get_timer_obj(TIM_HandleTypeDef *htim)
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{
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timerObj_t *obj;
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obj = (timerObj_t *)((char *)htim - offsetof(timerObj_t, handle));
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return (obj);
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}
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/**
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@brief TIMER Initialization - clock init and nvic init
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@param htim_base: TIM handle
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@retval None
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*/
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void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim_base)
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{
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timerObj_t *obj = get_timer_obj(htim_base);
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enableTimerClock(htim_base);
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// configure Update interrupt
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HAL_NVIC_SetPriority(getTimerUpIrq(htim_base->Instance), obj->preemptPriority, obj->subPriority);
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HAL_NVIC_EnableIRQ(getTimerUpIrq(htim_base->Instance));
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if (getTimerCCIrq(htim_base->Instance) != getTimerUpIrq(htim_base->Instance))
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{
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// configure Capture Compare interrupt
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HAL_NVIC_SetPriority(getTimerCCIrq(htim_base->Instance), obj->preemptPriority, obj->subPriority);
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HAL_NVIC_EnableIRQ(getTimerCCIrq(htim_base->Instance));
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}
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}
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/**
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@brief TIMER Deinitialization - clock and nvic
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@param htim_base: TIM handle
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@retval None
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*/
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void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim_base)
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{
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disableTimerClock(htim_base);
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HAL_NVIC_DisableIRQ(getTimerUpIrq(htim_base->Instance));
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HAL_NVIC_DisableIRQ(getTimerCCIrq(htim_base->Instance));
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}
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/**
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@brief Initializes the TIM Output Compare MSP.
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@param htim: TIM handle
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@retval None
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*/
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void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim)
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{
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timerObj_t *obj = get_timer_obj(htim);
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enableTimerClock(htim);
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// configure Update interrupt
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HAL_NVIC_SetPriority(getTimerUpIrq(htim->Instance), obj->preemptPriority, obj->subPriority);
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HAL_NVIC_EnableIRQ(getTimerUpIrq(htim->Instance));
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if (getTimerCCIrq(htim->Instance) != getTimerUpIrq(htim->Instance))
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{
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// configure Capture Compare interrupt
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HAL_NVIC_SetPriority(getTimerCCIrq(htim->Instance), obj->preemptPriority, obj->subPriority);
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HAL_NVIC_EnableIRQ(getTimerCCIrq(htim->Instance));
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}
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}
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/**
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@brief DeInitialize TIM Output Compare MSP.
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@param htim: TIM handle
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@retval None
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*/
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void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim)
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{
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disableTimerClock(htim);
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HAL_NVIC_DisableIRQ(getTimerUpIrq(htim->Instance));
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HAL_NVIC_DisableIRQ(getTimerCCIrq(htim->Instance));
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}
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/**
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@brief Initializes the TIM Input Capture MSP.
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@param htim: TIM handle
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@retval None
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*/
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void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim)
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{
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enableTimerClock(htim);
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}
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/**
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@brief DeInitialize TIM Input Capture MSP.
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@param htim: TIM handle
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@retval None
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*/
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void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef *htim)
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{
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disableTimerClock(htim);
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}
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/* Exported functions */
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/**
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@brief Enable the timer clock
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@param htim: TIM handle
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@retval None
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*/
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void enableTimerClock(TIM_HandleTypeDef *htim)
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{
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// Enable TIM clock
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#if defined(TIM1_BASE)
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if (htim->Instance == TIM1)
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{
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__HAL_RCC_TIM1_CLK_ENABLE();
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}
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#endif
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#if defined(TIM2_BASE)
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if (htim->Instance == TIM2)
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{
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__HAL_RCC_TIM2_CLK_ENABLE();
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}
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#endif
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#if defined(TIM3_BASE)
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if (htim->Instance == TIM3)
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{
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__HAL_RCC_TIM3_CLK_ENABLE();
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}
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#endif
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#if defined(TIM4_BASE)
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if (htim->Instance == TIM4)
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{
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__HAL_RCC_TIM4_CLK_ENABLE();
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}
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#endif
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#if defined(TIM5_BASE)
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if (htim->Instance == TIM5)
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{
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__HAL_RCC_TIM5_CLK_ENABLE();
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}
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#endif
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#if defined(TIM6_BASE)
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if (htim->Instance == TIM6)
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{
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__HAL_RCC_TIM6_CLK_ENABLE();
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}
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#endif
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#if defined(TIM7_BASE)
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if (htim->Instance == TIM7)
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{
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__HAL_RCC_TIM7_CLK_ENABLE();
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}
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#endif
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#if defined(TIM8_BASE)
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if (htim->Instance == TIM8)
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{
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__HAL_RCC_TIM8_CLK_ENABLE();
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}
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#endif
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#if defined(TIM9_BASE)
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if (htim->Instance == TIM9)
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{
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__HAL_RCC_TIM9_CLK_ENABLE();
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}
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#endif
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#if defined(TIM10_BASE)
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if (htim->Instance == TIM10)
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{
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__HAL_RCC_TIM10_CLK_ENABLE();
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}
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#endif
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#if defined(TIM11_BASE)
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if (htim->Instance == TIM11)
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{
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__HAL_RCC_TIM11_CLK_ENABLE();
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}
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#endif
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#if defined(TIM12_BASE)
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if (htim->Instance == TIM12)
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{
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__HAL_RCC_TIM12_CLK_ENABLE();
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}
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#endif
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#if defined(TIM13_BASE)
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if (htim->Instance == TIM13)
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{
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__HAL_RCC_TIM13_CLK_ENABLE();
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}
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#endif
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#if defined(TIM14_BASE)
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if (htim->Instance == TIM14)
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{
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__HAL_RCC_TIM14_CLK_ENABLE();
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}
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#endif
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#if defined(TIM15_BASE)
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if (htim->Instance == TIM15)
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{
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__HAL_RCC_TIM15_CLK_ENABLE();
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}
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#endif
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#if defined(TIM16_BASE)
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if (htim->Instance == TIM16)
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{
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__HAL_RCC_TIM16_CLK_ENABLE();
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}
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#endif
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#if defined(TIM17_BASE)
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if (htim->Instance == TIM17)
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{
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__HAL_RCC_TIM17_CLK_ENABLE();
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}
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#endif
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#if defined(TIM18_BASE)
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if (htim->Instance == TIM18)
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{
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__HAL_RCC_TIM18_CLK_ENABLE();
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}
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#endif
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#if defined(TIM19_BASE)
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if (htim->Instance == TIM19)
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{
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__HAL_RCC_TIM19_CLK_ENABLE();
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}
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#endif
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#if defined(TIM20_BASE)
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if (htim->Instance == TIM20)
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{
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__HAL_RCC_TIM20_CLK_ENABLE();
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}
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#endif
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#if defined(TIM21_BASE)
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if (htim->Instance == TIM21)
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{
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__HAL_RCC_TIM21_CLK_ENABLE();
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}
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#endif
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#if defined(TIM22_BASE)
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if (htim->Instance == TIM22)
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{
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__HAL_RCC_TIM22_CLK_ENABLE();
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}
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#endif
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}
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/**
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@brief Disable the timer clock
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@param htim: TIM handle
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@retval None
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*/
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void disableTimerClock(TIM_HandleTypeDef *htim)
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{
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// Enable TIM clock
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#if defined(TIM1_BASE)
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if (htim->Instance == TIM1)
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{
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__HAL_RCC_TIM1_CLK_DISABLE();
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}
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#endif
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#if defined(TIM2_BASE)
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if (htim->Instance == TIM2)
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{
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__HAL_RCC_TIM2_CLK_DISABLE();
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}
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#endif
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#if defined(TIM3_BASE)
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if (htim->Instance == TIM3)
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{
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__HAL_RCC_TIM3_CLK_DISABLE();
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}
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#endif
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#if defined(TIM4_BASE)
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if (htim->Instance == TIM4)
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{
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__HAL_RCC_TIM4_CLK_DISABLE();
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}
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#endif
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#if defined(TIM5_BASE)
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if (htim->Instance == TIM5)
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{
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__HAL_RCC_TIM5_CLK_DISABLE();
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}
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#endif
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#if defined(TIM6_BASE)
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if (htim->Instance == TIM6)
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{
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__HAL_RCC_TIM6_CLK_DISABLE();
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}
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#endif
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#if defined(TIM7_BASE)
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if (htim->Instance == TIM7)
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{
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__HAL_RCC_TIM7_CLK_DISABLE();
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}
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#endif
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#if defined(TIM8_BASE)
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if (htim->Instance == TIM8)
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{
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__HAL_RCC_TIM8_CLK_DISABLE();
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}
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#endif
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#if defined(TIM9_BASE)
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if (htim->Instance == TIM9)
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{
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__HAL_RCC_TIM9_CLK_DISABLE();
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}
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#endif
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#if defined(TIM10_BASE)
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if (htim->Instance == TIM10)
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{
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__HAL_RCC_TIM10_CLK_DISABLE();
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}
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#endif
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#if defined(TIM11_BASE)
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if (htim->Instance == TIM11)
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{
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__HAL_RCC_TIM11_CLK_DISABLE();
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}
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#endif
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#if defined(TIM12_BASE)
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if (htim->Instance == TIM12)
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{
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__HAL_RCC_TIM12_CLK_DISABLE();
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}
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#endif
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#if defined(TIM13_BASE)
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if (htim->Instance == TIM13)
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{
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__HAL_RCC_TIM13_CLK_DISABLE();
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}
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#endif
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#if defined(TIM14_BASE)
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if (htim->Instance == TIM14)
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{
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__HAL_RCC_TIM14_CLK_DISABLE();
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}
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#endif
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#if defined(TIM15_BASE)
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if (htim->Instance == TIM15)
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{
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__HAL_RCC_TIM15_CLK_DISABLE();
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}
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#endif
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#if defined(TIM16_BASE)
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if (htim->Instance == TIM16)
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{
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__HAL_RCC_TIM16_CLK_DISABLE();
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}
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#endif
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#if defined(TIM17_BASE)
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if (htim->Instance == TIM17)
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{
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__HAL_RCC_TIM17_CLK_DISABLE();
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}
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#endif
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#if defined(TIM18_BASE)
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if (htim->Instance == TIM18)
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{
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__HAL_RCC_TIM18_CLK_DISABLE();
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}
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#endif
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#if defined(TIM19_BASE)
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if (htim->Instance == TIM19)
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{
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__HAL_RCC_TIM19_CLK_DISABLE();
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}
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#endif
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#if defined(TIM20_BASE)
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if (htim->Instance == TIM20)
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{
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__HAL_RCC_TIM20_CLK_DISABLE();
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}
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#endif
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#if defined(TIM21_BASE)
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|
||
|
if (htim->Instance == TIM21)
|
||
|
{
|
||
|
__HAL_RCC_TIM21_CLK_DISABLE();
|
||
|
}
|
||
|
|
||
|
#endif
|
||
|
#if defined(TIM22_BASE)
|
||
|
|
||
|
if (htim->Instance == TIM22)
|
||
|
{
|
||
|
__HAL_RCC_TIM22_CLK_DISABLE();
|
||
|
}
|
||
|
|
||
|
#endif
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
@brief This function return IRQ number corresponding to update interrupt event of timer instance.
|
||
|
@param tim: timer instance
|
||
|
@retval IRQ number
|
||
|
*/
|
||
|
IRQn_Type getTimerUpIrq(TIM_TypeDef *tim)
|
||
|
{
|
||
|
IRQn_Type IRQn = NonMaskableInt_IRQn;
|
||
|
|
||
|
if (tim != (TIM_TypeDef *)NC)
|
||
|
{
|
||
|
/* Get IRQn depending on TIM instance */
|
||
|
switch ((uint32_t)tim)
|
||
|
{
|
||
|
#if defined(TIM1_BASE)
|
||
|
|
||
|
case (uint32_t)TIM1_BASE:
|
||
|
IRQn = TIM1_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM2_BASE)
|
||
|
|
||
|
case (uint32_t)TIM2_BASE:
|
||
|
IRQn = TIM2_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM3_BASE)
|
||
|
|
||
|
case (uint32_t)TIM3_BASE:
|
||
|
IRQn = TIM3_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM4_BASE)
|
||
|
|
||
|
case (uint32_t)TIM4_BASE:
|
||
|
IRQn = TIM4_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM5_BASE)
|
||
|
|
||
|
case (uint32_t)TIM5_BASE:
|
||
|
IRQn = TIM5_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
|
||
|
// KH
|
||
|
#if 0
|
||
|
#if defined(TIM6_BASE)
|
||
|
|
||
|
case (uint32_t)TIM6_BASE:
|
||
|
IRQn = TIM6_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#endif
|
||
|
//////
|
||
|
|
||
|
#if defined(TIM7_BASE)
|
||
|
|
||
|
case (uint32_t)TIM7_BASE:
|
||
|
IRQn = TIM7_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM8_BASE)
|
||
|
|
||
|
case (uint32_t)TIM8_BASE:
|
||
|
IRQn = TIM8_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM9_BASE)
|
||
|
|
||
|
case (uint32_t)TIM9_BASE:
|
||
|
IRQn = TIM9_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM10_BASE)
|
||
|
|
||
|
case (uint32_t)TIM10_BASE:
|
||
|
IRQn = TIM10_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM11_BASE)
|
||
|
|
||
|
case (uint32_t)TIM11_BASE:
|
||
|
IRQn = TIM11_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM12_BASE)
|
||
|
|
||
|
case (uint32_t)TIM12_BASE:
|
||
|
IRQn = TIM12_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM13_BASE)
|
||
|
|
||
|
case (uint32_t)TIM13_BASE:
|
||
|
IRQn = TIM13_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM14_BASE)
|
||
|
|
||
|
case (uint32_t)TIM14_BASE:
|
||
|
IRQn = TIM14_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM15_BASE)
|
||
|
|
||
|
case (uint32_t)TIM15_BASE:
|
||
|
IRQn = TIM15_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM16_BASE)
|
||
|
|
||
|
case (uint32_t)TIM16_BASE:
|
||
|
IRQn = TIM16_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM17_BASE)
|
||
|
|
||
|
case (uint32_t)TIM17_BASE:
|
||
|
IRQn = TIM17_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM18_BASE)
|
||
|
|
||
|
case (uint32_t)TIM18_BASE:
|
||
|
IRQn = TIM18_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM19_BASE)
|
||
|
|
||
|
case (uint32_t)TIM19_BASE:
|
||
|
IRQn = TIM19_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM20_BASE)
|
||
|
|
||
|
case (uint32_t)TIM20_BASE:
|
||
|
IRQn = TIM20_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM21_BASE)
|
||
|
|
||
|
case (uint32_t)TIM21_BASE:
|
||
|
IRQn = TIM21_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM22_BASE)
|
||
|
|
||
|
case (uint32_t)TIM22_BASE:
|
||
|
IRQn = TIM22_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
|
||
|
default:
|
||
|
//_Error_Handler("TIM: Unknown timer IRQn", (int)tim);
|
||
|
break;
|
||
|
}
|
||
|
}
|
||
|
|
||
|
return IRQn;
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
@brief This function return IRQ number corresponding to Capture or Compare interrupt event of timer instance.
|
||
|
@param tim: timer instance
|
||
|
@retval IRQ number
|
||
|
*/
|
||
|
IRQn_Type getTimerCCIrq(TIM_TypeDef *tim)
|
||
|
{
|
||
|
IRQn_Type IRQn = NonMaskableInt_IRQn;
|
||
|
|
||
|
if (tim != (TIM_TypeDef *)NC)
|
||
|
{
|
||
|
/* Get IRQn depending on TIM instance */
|
||
|
switch ((uint32_t)tim)
|
||
|
{
|
||
|
#if defined(TIM1_BASE)
|
||
|
|
||
|
case (uint32_t)TIM1_BASE:
|
||
|
IRQn = TIM1_CC_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM2_BASE)
|
||
|
|
||
|
case (uint32_t)TIM2_BASE:
|
||
|
IRQn = TIM2_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM3_BASE)
|
||
|
|
||
|
case (uint32_t)TIM3_BASE:
|
||
|
IRQn = TIM3_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM4_BASE)
|
||
|
|
||
|
case (uint32_t)TIM4_BASE:
|
||
|
IRQn = TIM4_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM5_BASE)
|
||
|
|
||
|
case (uint32_t)TIM5_BASE:
|
||
|
IRQn = TIM5_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
|
||
|
#if 0
|
||
|
// KH
|
||
|
#if defined(TIM6_BASE)
|
||
|
|
||
|
case (uint32_t)TIM6_BASE:
|
||
|
IRQn = TIM6_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#endif
|
||
|
//////
|
||
|
|
||
|
#if defined(TIM7_BASE)
|
||
|
|
||
|
case (uint32_t)TIM7_BASE:
|
||
|
IRQn = TIM7_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM8_BASE)
|
||
|
|
||
|
case (uint32_t)TIM8_BASE:
|
||
|
IRQn = TIM8_CC_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM9_BASE)
|
||
|
|
||
|
case (uint32_t)TIM9_BASE:
|
||
|
IRQn = TIM9_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM10_BASE)
|
||
|
|
||
|
case (uint32_t)TIM10_BASE:
|
||
|
IRQn = TIM10_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM11_BASE)
|
||
|
|
||
|
case (uint32_t)TIM11_BASE:
|
||
|
IRQn = TIM11_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM12_BASE)
|
||
|
|
||
|
case (uint32_t)TIM12_BASE:
|
||
|
IRQn = TIM12_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM13_BASE)
|
||
|
|
||
|
case (uint32_t)TIM13_BASE:
|
||
|
IRQn = TIM13_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM14_BASE)
|
||
|
|
||
|
case (uint32_t)TIM14_BASE:
|
||
|
IRQn = TIM14_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM15_BASE)
|
||
|
|
||
|
case (uint32_t)TIM15_BASE:
|
||
|
IRQn = TIM15_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM16_BASE)
|
||
|
|
||
|
case (uint32_t)TIM16_BASE:
|
||
|
IRQn = TIM16_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM17_BASE)
|
||
|
|
||
|
case (uint32_t)TIM17_BASE:
|
||
|
IRQn = TIM17_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM18_BASE)
|
||
|
|
||
|
case (uint32_t)TIM18_BASE:
|
||
|
IRQn = TIM18_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM19_BASE)
|
||
|
|
||
|
case (uint32_t)TIM19_BASE:
|
||
|
IRQn = TIM19_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM20_BASE)
|
||
|
|
||
|
case (uint32_t)TIM20_BASE:
|
||
|
IRQn = TIM20_CC_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM21_BASE)
|
||
|
|
||
|
case (uint32_t)TIM21_BASE:
|
||
|
IRQn = TIM21_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
#if defined(TIM22_BASE)
|
||
|
|
||
|
case (uint32_t)TIM22_BASE:
|
||
|
IRQn = TIM22_IRQn;
|
||
|
break;
|
||
|
#endif
|
||
|
break;
|
||
|
|
||
|
default:
|
||
|
//_Error_Handler("TIM: Unknown timer IRQn", (int)tim);
|
||
|
break;
|
||
|
}
|
||
|
}
|
||
|
|
||
|
return IRQn;
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
@brief This function return the timer clock source.
|
||
|
@param tim: timer instance
|
||
|
@retval 1 = PCLK1 or 2 = PCLK2
|
||
|
*/
|
||
|
uint8_t getTimerClkSrc(TIM_TypeDef *tim)
|
||
|
{
|
||
|
uint8_t clkSrc = 0;
|
||
|
|
||
|
if (tim != (TIM_TypeDef *)NC)
|
||
|
#if defined(STM32F0xx) || defined(STM32G0xx)
|
||
|
/* TIMx source CLK is PCKL1 */
|
||
|
clkSrc = 1;
|
||
|
|
||
|
#else
|
||
|
{
|
||
|
/* Get source clock depending on TIM instance */
|
||
|
switch ((uint32_t)tim)
|
||
|
{
|
||
|
#if defined(TIM2_BASE)
|
||
|
|
||
|
case (uint32_t)TIM2:
|
||
|
#endif
|
||
|
#if defined(TIM3_BASE)
|
||
|
case (uint32_t)TIM3:
|
||
|
#endif
|
||
|
#if defined(TIM4_BASE)
|
||
|
case (uint32_t)TIM4:
|
||
|
#endif
|
||
|
#if defined(TIM5_BASE)
|
||
|
case (uint32_t)TIM5:
|
||
|
#endif
|
||
|
#if defined(TIM6_BASE)
|
||
|
case (uint32_t)TIM6:
|
||
|
#endif
|
||
|
#if defined(TIM7_BASE)
|
||
|
case (uint32_t)TIM7:
|
||
|
#endif
|
||
|
#if defined(TIM12_BASE)
|
||
|
case (uint32_t)TIM12:
|
||
|
#endif
|
||
|
#if defined(TIM13_BASE)
|
||
|
case (uint32_t)TIM13:
|
||
|
#endif
|
||
|
#if defined(TIM14_BASE)
|
||
|
case (uint32_t)TIM14:
|
||
|
#endif
|
||
|
#if defined(TIM18_BASE)
|
||
|
case (uint32_t)TIM18:
|
||
|
#endif
|
||
|
clkSrc = 1;
|
||
|
break;
|
||
|
#if defined(TIM1_BASE)
|
||
|
|
||
|
case (uint32_t)TIM1:
|
||
|
#endif
|
||
|
#if defined(TIM8_BASE)
|
||
|
case (uint32_t)TIM8:
|
||
|
#endif
|
||
|
#if defined(TIM9_BASE)
|
||
|
case (uint32_t)TIM9:
|
||
|
#endif
|
||
|
#if defined(TIM10_BASE)
|
||
|
case (uint32_t)TIM10:
|
||
|
#endif
|
||
|
#if defined(TIM11_BASE)
|
||
|
case (uint32_t)TIM11:
|
||
|
#endif
|
||
|
#if defined(TIM15_BASE)
|
||
|
case (uint32_t)TIM15:
|
||
|
#endif
|
||
|
#if defined(TIM16_BASE)
|
||
|
case (uint32_t)TIM16:
|
||
|
#endif
|
||
|
#if defined(TIM17_BASE)
|
||
|
case (uint32_t)TIM17:
|
||
|
#endif
|
||
|
#if defined(TIM19_BASE)
|
||
|
case (uint32_t)TIM19:
|
||
|
#endif
|
||
|
#if defined(TIM20_BASE)
|
||
|
case (uint32_t)TIM20:
|
||
|
#endif
|
||
|
#if defined(TIM21_BASE)
|
||
|
case (uint32_t)TIM21:
|
||
|
#endif
|
||
|
#if defined(TIM22_BASE)
|
||
|
case (uint32_t)TIM22:
|
||
|
#endif
|
||
|
clkSrc = 2;
|
||
|
break;
|
||
|
|
||
|
default:
|
||
|
////_Error_Handler("TIM: Unknown timer instance", (int)tim);
|
||
|
break;
|
||
|
}
|
||
|
}
|
||
|
#endif
|
||
|
return clkSrc;
|
||
|
}
|
||
|
|
||
|
|
||
|
#endif /* HAL_TIM_MODULE_ENABLED && !HAL_TIM_MODULE_ONLY */
|
||
|
|
||
|
#ifdef __cplusplus
|
||
|
}
|
||
|
#endif
|
||
|
#endif
|
||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|