2022-08-06 10:53:14 +02:00
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/*
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2023-02-17 17:04:21 +01:00
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* © 2023 Neil McKechnie
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2023-04-13 09:27:22 +02:00
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* © 2022-23 Paul M. Antoine
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2022-08-06 10:53:14 +02:00
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* © 2021 Mike S
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2023-04-13 09:27:22 +02:00
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* © 2021, 2023 Harald Barth
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2022-08-06 10:53:14 +02:00
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* © 2021 Fred Decker
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* © 2021 Chris Harlow
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* © 2021 David Cutting
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* All rights reserved.
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*
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* This file is part of Asbelos DCC API
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*
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* This is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* It is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with CommandStation. If not, see <https://www.gnu.org/licenses/>.
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*/
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// ATTENTION: this file only compiles on a STM32 based boards
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// Please refer to DCCTimer.h for general comments about how this class works
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// This is to avoid repetition and duplication.
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#ifdef ARDUINO_ARCH_STM32
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#include "DCCTimer.h"
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2023-06-18 19:26:38 +02:00
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#ifdef DEBUG_ADC
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#include "TrackManager.h"
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#endif
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#include "DIAG.h"
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2022-08-06 10:53:14 +02:00
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2023-01-14 05:43:05 +01:00
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#if defined(ARDUINO_NUCLEO_F411RE)
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2023-06-20 02:34:27 +02:00
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// Nucleo-64 boards don't have additional serial ports defined by default
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2022-09-03 07:06:02 +02:00
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HardwareSerial Serial1(PB7, PA15); // Rx=PB7, Tx=PA15 -- CN7 pins 17 and 21 - F411RE
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2022-10-24 05:12:56 +02:00
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// Serial2 is defined to use USART2 by default, but is in fact used as the diag console
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2023-01-09 09:24:29 +01:00
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// via the debugger on the Nucleo-64. It is therefore unavailable for other DCC-EX uses like WiFi, DFPlayer, etc.
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// Let's define Serial6 as an additional serial port (the only other option for the Nucleo-64s)
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2023-06-20 02:34:27 +02:00
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HardwareSerial Serial6(PA12, PA11); // Rx=PA12, Tx=PA11 -- CN10 pins 12 and 14 - F411RE
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2023-01-14 05:43:05 +01:00
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#elif defined(ARDUINO_NUCLEO_F446RE)
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2023-06-20 02:34:27 +02:00
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// Nucleo-64 boards don't have additional serial ports defined by default
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// On the F446RE, Serial1 isn't really useable as it's Rx/Tx pair sit on already used D2/D10 pins
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2023-05-20 15:50:20 +02:00
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// HardwareSerial Serial1(PA10, PB6); // Rx=PA10 (D2), Tx=PB6 (D10) -- CN10 pins 17 and 9 - F446RE
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2023-01-14 05:43:05 +01:00
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// Serial2 is defined to use USART2 by default, but is in fact used as the diag console
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// via the debugger on the Nucleo-64. It is therefore unavailable for other DCC-EX uses like WiFi, DFPlayer, etc.
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2023-06-20 02:34:27 +02:00
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// On the F446RE, Serial3 and Serial5 are easy to use:
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HardwareSerial Serial3(PC11, PC10); // Rx=PC11, Tx=PC10 -- USART3 - F446RE
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HardwareSerial Serial5(PD2, PC12); // Rx=PC7, Tx=PC6 -- UART5 - F446RE
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// On the F446RE, Serial4 and Serial6 also use pins we can't readily map while using the Arduino pins
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2023-01-13 10:24:26 +01:00
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#elif defined(ARDUINO_NUCLEO_F412ZG) || defined(ARDUINO_NUCLEO_F429ZI) || defined(ARDUINO_NUCLEO_F446ZE)
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2022-11-27 14:04:49 +01:00
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// Nucleo-144 boards don't have Serial1 defined by default
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2023-06-20 02:34:27 +02:00
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HardwareSerial Serial6(PG9, PG14); // Rx=PG9, Tx=PG14 -- USART6
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2023-05-25 02:34:20 +02:00
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// Serial3 is defined to use USART3 by default, but is in fact used as the diag console
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2023-04-13 09:27:22 +02:00
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// via the debugger on the Nucleo-144. It is therefore unavailable for other DCC-EX uses like WiFi, DFPlayer, etc.
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2022-09-03 07:06:02 +02:00
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#else
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2023-04-13 09:27:22 +02:00
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#error STM32 board selected is not yet explicitly supported - so Serial1 peripheral is not defined
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2022-09-03 07:06:02 +02:00
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#endif
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2022-08-06 10:53:14 +02:00
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2023-03-15 10:31:54 +01:00
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///////////////////////////////////////////////////////////////////////////////////////////////
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// Experimental code for High Accuracy (HA) DCC Signal mode
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// Warning - use of TIM2 and TIM3 can affect the use of analogWrite() function on certain pins,
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// which is used by the DC motor types.
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///////////////////////////////////////////////////////////////////////////////////////////////
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// INTERRUPT_CALLBACK interruptHandler=0;
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// // Let's use STM32's timer #2 which supports hardware pulse generation on pin D13.
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// // Also, timer #3 will do hardware pulses on pin D12. This gives
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// // accurate timing, independent of the latency of interrupt handling.
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// // We only need to interrupt on one of these (TIM2), the other will just generate
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// // pulses.
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// HardwareTimer timer(TIM2);
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// HardwareTimer timerAux(TIM3);
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// static bool tim2ModeHA = false;
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// static bool tim3ModeHA = false;
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// // Timer IRQ handler
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// void Timer_Handler() {
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// interruptHandler();
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// }
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// void DCCTimer::begin(INTERRUPT_CALLBACK callback) {
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// interruptHandler=callback;
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// noInterrupts();
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// // adc_set_sample_rate(ADC_SAMPLETIME_480CYCLES);
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// timer.pause();
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// timerAux.pause();
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// timer.setPrescaleFactor(1);
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// timer.setOverflow(DCC_SIGNAL_TIME, MICROSEC_FORMAT);
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// timer.attachInterrupt(Timer_Handler);
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// timer.refresh();
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// timerAux.setPrescaleFactor(1);
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// timerAux.setOverflow(DCC_SIGNAL_TIME, MICROSEC_FORMAT);
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// timerAux.refresh();
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// timer.resume();
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// timerAux.resume();
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// interrupts();
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// }
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// bool DCCTimer::isPWMPin(byte pin) {
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// // Timer 2 Channel 1 controls pin D13, and Timer3 Channel 1 controls D12.
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// // Enable the appropriate timer channel.
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// switch (pin) {
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// case 12:
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// return true;
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// case 13:
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// return true;
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// default:
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// return false;
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// }
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// }
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// void DCCTimer::setPWM(byte pin, bool high) {
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// // Set the timer so that, at the next counter overflow, the requested
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// // pin state is activated automatically before the interrupt code runs.
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// // TIM2 is timer, TIM3 is timerAux.
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// switch (pin) {
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// case 12:
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// if (!tim3ModeHA) {
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// timerAux.setMode(1, TIMER_OUTPUT_COMPARE_INACTIVE, D12);
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// tim3ModeHA = true;
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// }
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// if (high)
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// TIM3->CCMR1 = (TIM3->CCMR1 & ~TIM_CCMR1_OC1M_Msk) | TIM_CCMR1_OC1M_0;
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// else
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// TIM3->CCMR1 = (TIM3->CCMR1 & ~TIM_CCMR1_OC1M_Msk) | TIM_CCMR1_OC1M_1;
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// break;
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// case 13:
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// if (!tim2ModeHA) {
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// timer.setMode(1, TIMER_OUTPUT_COMPARE_INACTIVE, D13);
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// tim2ModeHA = true;
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// }
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// if (high)
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// TIM2->CCMR1 = (TIM2->CCMR1 & ~TIM_CCMR1_OC1M_Msk) | TIM_CCMR1_OC1M_0;
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// else
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// TIM2->CCMR1 = (TIM2->CCMR1 & ~TIM_CCMR1_OC1M_Msk) | TIM_CCMR1_OC1M_1;
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// break;
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// }
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// }
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// void DCCTimer::clearPWM() {
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// timer.setMode(1, TIMER_OUTPUT_COMPARE_INACTIVE, NC);
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// tim2ModeHA = false;
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// timerAux.setMode(1, TIMER_OUTPUT_COMPARE_INACTIVE, NC);
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// tim3ModeHA = false;
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// }
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///////////////////////////////////////////////////////////////////////////////////////////////
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2022-08-06 10:53:14 +02:00
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INTERRUPT_CALLBACK interruptHandler=0;
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2023-03-15 10:31:54 +01:00
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// Let's use STM32's timer #11 until disabused of this notion
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// Timer #11 is used for "servo" library, but as DCC-EX is not using
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// this libary, we should be free and clear.
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HardwareTimer timer(TIM11);
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2022-08-06 10:53:14 +02:00
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// Timer IRQ handler
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2023-03-15 10:31:54 +01:00
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void Timer11_Handler() {
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2022-08-06 10:53:14 +02:00
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interruptHandler();
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}
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void DCCTimer::begin(INTERRUPT_CALLBACK callback) {
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interruptHandler=callback;
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noInterrupts();
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2022-08-17 08:29:02 +02:00
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// adc_set_sample_rate(ADC_SAMPLETIME_480CYCLES);
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2022-08-06 10:53:14 +02:00
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timer.pause();
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timer.setPrescaleFactor(1);
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2023-03-15 10:31:54 +01:00
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// timer.setOverflow(CLOCK_CYCLES * 2);
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2022-08-09 06:28:15 +02:00
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timer.setOverflow(DCC_SIGNAL_TIME, MICROSEC_FORMAT);
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2023-03-15 10:31:54 +01:00
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timer.attachInterrupt(Timer11_Handler);
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2022-08-06 10:53:14 +02:00
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timer.refresh();
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timer.resume();
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interrupts();
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}
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bool DCCTimer::isPWMPin(byte pin) {
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2023-03-15 10:31:54 +01:00
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//TODO: SAMD whilst this call to digitalPinHasPWM will reveal which pins can do PWM,
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// there's no support yet for High Accuracy, so for now return false
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// return digitalPinHasPWM(pin);
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return false;
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2022-08-06 10:53:14 +02:00
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}
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void DCCTimer::setPWM(byte pin, bool high) {
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2023-03-15 10:31:54 +01:00
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// TODO: High Accuracy mode is not supported as yet, and may never need to be
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(void) pin;
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(void) high;
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2022-08-06 10:53:14 +02:00
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}
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void DCCTimer::clearPWM() {
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2023-03-15 10:31:54 +01:00
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return;
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2022-08-06 10:53:14 +02:00
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}
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void DCCTimer::getSimulatedMacAddress(byte mac[6]) {
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2022-11-28 03:44:41 +01:00
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volatile uint32_t *serno1 = (volatile uint32_t *)0x1FFF7A10;
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volatile uint32_t *serno2 = (volatile uint32_t *)0x1FFF7A14;
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2023-01-28 07:39:00 +01:00
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// volatile uint32_t *serno3 = (volatile uint32_t *)0x1FFF7A18;
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2022-08-06 10:53:14 +02:00
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volatile uint32_t m1 = *serno1;
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volatile uint32_t m2 = *serno2;
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mac[0] = m1 >> 8;
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mac[1] = m1 >> 0;
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mac[2] = m2 >> 24;
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mac[3] = m2 >> 16;
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mac[4] = m2 >> 8;
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mac[5] = m2 >> 0;
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}
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volatile int DCCTimer::minimum_free_memory=__INT_MAX__;
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// Return low memory value...
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int DCCTimer::getMinimumFreeMemory() {
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noInterrupts(); // Disable interrupts to get volatile value
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int retval = freeMemory();
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interrupts();
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return retval;
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}
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extern "C" char* sbrk(int incr);
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int DCCTimer::freeMemory() {
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char top;
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return (int)(&top - reinterpret_cast<char *>(sbrk(0)));
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}
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void DCCTimer::reset() {
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__disable_irq();
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NVIC_SystemReset();
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while(true) {};
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}
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2023-01-28 06:58:55 +01:00
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// TODO: may need to use uint32_t on STMF4xx variants with > 16 analog inputs!
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2023-04-13 09:27:22 +02:00
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#if defined(ARDUINO_NUCLEO_F446RE) || defined(ARDUINO_NUCLEO_F429ZI) || defined(ARDUINO_NUCLEO_F446ZE)
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#warning STM32 board selected not fully supported - only use ADC1 inputs 0-15 for current sensing!
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#endif
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2023-06-19 11:47:42 +02:00
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// For now, define the max of 16 ports - some variants have more, but this not **yet** supported
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#define NUM_ADC_INPUTS 16
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// #define NUM_ADC_INPUTS NUM_ANALOG_INPUTS
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2023-01-28 06:58:55 +01:00
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uint16_t ADCee::usedpins = 0;
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2023-06-19 11:47:42 +02:00
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uint8_t ADCee::highestPin = 0;
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2023-01-28 06:58:55 +01:00
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int * ADCee::analogvals = NULL;
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uint32_t * analogchans = NULL;
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bool adc1configured = false;
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2022-10-24 02:33:08 +02:00
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int16_t ADCee::ADCmax() {
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return 4095;
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}
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int ADCee::init(uint8_t pin) {
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2023-04-08 23:35:48 +02:00
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2023-01-28 06:58:55 +01:00
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int value = 0;
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2023-04-08 23:33:33 +02:00
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PinName stmpin = analogInputToPinName(pin);
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2023-04-10 01:47:00 +02:00
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if (stmpin == NC) // do not continue if this is not an analog pin at all
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return -1024; // some silly value as error
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uint32_t stmgpio = STM_PORT(stmpin); // converts to the GPIO port (16-bits per port group on STM32)
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2023-01-28 06:58:55 +01:00
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uint32_t adcchan = STM_PIN_CHANNEL(pinmap_function(stmpin, PinMap_ADC)); // find ADC channel (only valid for ADC1!)
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GPIO_TypeDef * gpioBase;
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// Port config - find which port we're on and power it up
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switch(stmgpio) {
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case 0x00:
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN; //Power up PORTA
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gpioBase = GPIOA;
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break;
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case 0x01:
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN; //Power up PORTB
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gpioBase = GPIOB;
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break;
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case 0x02:
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN; //Power up PORTC
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gpioBase = GPIOC;
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break;
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2023-04-10 01:47:00 +02:00
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default:
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return -1023; // some silly value as error
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2023-01-28 06:58:55 +01:00
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}
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2023-04-10 01:47:00 +02:00
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// Set pin mux mode to analog input, the 32 bit port mode register has 2 bits per pin
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gpioBase->MODER |= (0b011 << (STM_PIN(stmpin) << 1)); // Set pin mux to analog mode (binary 11)
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2023-01-28 06:58:55 +01:00
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// Set the sampling rate for that analog input
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2023-04-10 01:47:00 +02:00
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// This is F411x specific! Different on for example F334
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// STM32F11xC/E Reference manual
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// 11.12.4 ADC sample time register 1 (ADC_SMPR1) (channels 10 to 18)
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// 11.12.5 ADC sample time register 2 (ADC_SMPR2) (channels 0 to 9)
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if (adcchan > 18)
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return -1022; // silly value as error
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2023-01-28 06:58:55 +01:00
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if (adcchan < 10)
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2023-01-28 07:39:00 +01:00
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ADC1->SMPR2 |= (0b111 << (adcchan * 3)); // Channel sampling rate 480 cycles
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2023-01-28 06:58:55 +01:00
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else
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2023-01-28 07:39:00 +01:00
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ADC1->SMPR1 |= (0b111 << ((adcchan - 10) * 3)); // Channel sampling rate 480 cycles
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2023-01-28 06:58:55 +01:00
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// Read the inital ADC value for this analog input
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ADC1->SQR3 = adcchan; // 1st conversion in regular sequence
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ADC1->CR2 |= (1 << 30); // Start 1st conversion SWSTART
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while(!(ADC1->SR & (1 << 1))); // Wait until conversion is complete
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value = ADC1->DR; // Read value from register
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2023-04-11 12:13:47 +02:00
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uint8_t id = pin - PNUM_ANALOG_BASE;
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if (id > 15) { // today we have not enough bits in the mask to support more
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|
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return -1021;
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}
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|
|
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if (analogvals == NULL) { // allocate analogvals and analogchans if this is the first invocation of init.
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2023-01-28 06:58:55 +01:00
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analogvals = (int *)calloc(NUM_ADC_INPUTS+1, sizeof(int));
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analogchans = (uint32_t *)calloc(NUM_ADC_INPUTS+1, sizeof(uint32_t));
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}
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analogvals[id] = value; // Store sampled value
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analogchans[id] = adcchan; // Keep track of which ADC channel is used for reading this pin
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usedpins |= (1 << id); // This pin is now ready
|
2023-06-19 11:47:42 +02:00
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if (id > highestPin) highestPin = id; // Store our highest pin in use
|
2023-01-28 06:58:55 +01:00
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|
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|
2023-06-18 19:26:38 +02:00
|
|
|
DIAG(F("ADCee::init(): value=%d, channel=%d, id=%d"), value, adcchan, id);
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|
2023-01-28 06:58:55 +01:00
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|
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return value;
|
2022-10-24 02:33:08 +02:00
|
|
|
}
|
2023-01-28 06:58:55 +01:00
|
|
|
|
2022-10-24 02:33:08 +02:00
|
|
|
/*
|
|
|
|
* Read function ADCee::read(pin) to get value instead of analogRead(pin)
|
|
|
|
*/
|
|
|
|
int ADCee::read(uint8_t pin, bool fromISR) {
|
2023-04-08 23:33:33 +02:00
|
|
|
uint8_t id = pin - PNUM_ANALOG_BASE;
|
2023-01-28 06:58:55 +01:00
|
|
|
// Was this pin initialised yet?
|
|
|
|
if ((usedpins & (1<<id) ) == 0)
|
|
|
|
return -1023;
|
|
|
|
// We do not need to check (analogvals == NULL)
|
|
|
|
// because usedpins would still be 0 in that case
|
|
|
|
return analogvals[id];
|
2022-10-24 02:33:08 +02:00
|
|
|
}
|
2023-01-28 06:58:55 +01:00
|
|
|
|
2022-10-24 02:33:08 +02:00
|
|
|
/*
|
|
|
|
* Scan function that is called from interrupt
|
|
|
|
*/
|
2023-01-28 06:58:55 +01:00
|
|
|
#pragma GCC push_options
|
|
|
|
#pragma GCC optimize ("-O3")
|
2022-10-24 02:33:08 +02:00
|
|
|
void ADCee::scan() {
|
2023-04-08 23:33:33 +02:00
|
|
|
static uint8_t id = 0; // id and mask are the same thing but it is faster to
|
2023-01-28 06:58:55 +01:00
|
|
|
static uint16_t mask = 1; // increment and shift instead to calculate mask from id
|
|
|
|
static bool waiting = false;
|
|
|
|
|
|
|
|
if (waiting) {
|
|
|
|
// look if we have a result
|
2023-01-28 07:39:00 +01:00
|
|
|
if (!(ADC1->SR & (1 << 1)))
|
2023-01-28 06:58:55 +01:00
|
|
|
return; // no result, continue to wait
|
|
|
|
// found value
|
|
|
|
analogvals[id] = ADC1->DR;
|
|
|
|
// advance at least one track
|
2023-06-18 19:26:38 +02:00
|
|
|
#ifdef DEBUG_ADC
|
|
|
|
if (id == 1) TrackManager::track[1]->setBrake(0);
|
|
|
|
#endif
|
2023-01-28 06:58:55 +01:00
|
|
|
waiting = false;
|
|
|
|
id++;
|
|
|
|
mask = mask << 1;
|
2023-06-19 11:47:42 +02:00
|
|
|
if (id > highestPin) { // the 1 has been shifted out
|
2023-01-28 06:58:55 +01:00
|
|
|
id = 0;
|
|
|
|
mask = 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (!waiting) {
|
|
|
|
if (usedpins == 0) // otherwise we would loop forever
|
|
|
|
return;
|
|
|
|
// look for a valid track to sample or until we are around
|
|
|
|
while (true) {
|
|
|
|
if (mask & usedpins) {
|
2023-06-18 19:26:38 +02:00
|
|
|
// start new ADC aquire on id
|
2023-01-28 06:58:55 +01:00
|
|
|
ADC1->SQR3 = analogchans[id]; //1st conversion in regular sequence
|
|
|
|
ADC1->CR2 |= (1 << 30); //Start 1st conversion SWSTART
|
2023-06-18 19:26:38 +02:00
|
|
|
#ifdef DEBUG_ADC
|
|
|
|
if (id == 1) TrackManager::track[1]->setBrake(1);
|
|
|
|
#endif
|
|
|
|
waiting = true;
|
|
|
|
return;
|
2023-01-28 06:58:55 +01:00
|
|
|
}
|
|
|
|
id++;
|
|
|
|
mask = mask << 1;
|
2023-06-19 11:47:42 +02:00
|
|
|
if (id > highestPin) {
|
|
|
|
id = 0;
|
|
|
|
mask = 1;
|
2023-01-28 06:58:55 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2022-10-24 02:33:08 +02:00
|
|
|
}
|
2023-01-28 06:58:55 +01:00
|
|
|
#pragma GCC pop_options
|
2022-10-24 02:33:08 +02:00
|
|
|
|
|
|
|
void ADCee::begin() {
|
|
|
|
noInterrupts();
|
2023-01-28 06:58:55 +01:00
|
|
|
//ADC1 config sequence
|
|
|
|
// TODO: currently defaults to ADC1, may need more to handle other members of STM32F4xx family
|
|
|
|
RCC->APB2ENR |= (1 << 8); //Enable ADC1 clock (Bit8)
|
|
|
|
// Set ADC prescaler - DIV8 ~ 40ms, DIV6 ~ 30ms, DIV4 ~ 20ms, DIV2 ~ 11ms
|
|
|
|
ADC->CCR = (0 << 16); // Set prescaler 0=DIV2, 1=DIV4, 2=DIV6, 3=DIV8
|
|
|
|
ADC1->CR1 &= ~(1 << 8); //SCAN mode disabled (Bit8)
|
|
|
|
ADC1->CR1 &= ~(3 << 24); //12bit resolution (Bit24,25 0b00)
|
|
|
|
ADC1->SQR1 = (1 << 20); //Set number of conversions projected (L[3:0] 0b0001) -> 1 conversion
|
|
|
|
ADC1->CR2 &= ~(1 << 1); //Single conversion
|
|
|
|
ADC1->CR2 &= ~(1 << 11); //Right alignment of data bits bit12....bit0
|
|
|
|
ADC1->SQR1 &= ~(0x3FFFFFFF); //Clear whole 1st 30bits in register
|
|
|
|
ADC1->SQR2 &= ~(0x3FFFFFFF); //Clear whole 1st 30bits in register
|
|
|
|
ADC1->SQR3 &= ~(0x3FFFFFFF); //Clear whole 1st 30bits in register
|
|
|
|
ADC1->CR2 |= (1 << 0); // Switch on ADC1
|
2022-10-24 02:33:08 +02:00
|
|
|
interrupts();
|
|
|
|
}
|
2023-04-08 23:33:33 +02:00
|
|
|
#endif
|