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Transmit DCC packet to loco
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parent
10209ed6f3
commit
005ddef665
75
DCCRMT.cpp
75
DCCRMT.cpp
@ -55,7 +55,7 @@ void setEOT(rmt_item32_t* item) {
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void IRAM_ATTR interrupt(rmt_channel_t channel, void *t) {
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RMTPin *tt = (RMTPin *)t;
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tt->RMTinterrupt(channel);
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tt->RMTinterrupt();
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}
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RMTPin::RMTPin(byte pin, byte ch, byte plen) {
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@ -65,7 +65,7 @@ RMTPin::RMTPin(byte pin, byte ch, byte plen) {
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preamble = (rmt_item32_t*)malloc(preambleLen*sizeof(rmt_item32_t));
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for (byte n=0; n<plen; n++)
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setDCCBit1(preamble + n); // preamble bits
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setDCCBit0Last(preamble + plen); // start of packet 0 bit
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setDCCBit0(preamble + plen); // start of packet 0 bit
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setEOT(preamble + plen + 1); // EOT marker
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// idle
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@ -81,6 +81,10 @@ RMTPin::RMTPin(byte pin, byte ch, byte plen) {
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setDCCBit0Last(idle + 27); // finish always with 0
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setEOT(idle + 28); // EOT marker
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// data: max packet size today is 5 + checksum
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dataLen = (5+1)*9+2; // Each byte has one bit extra and one 0 bit and one EOF marker
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data = (rmt_item32_t*)malloc(dataLen*sizeof(rmt_item32_t));
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rmt_config_t config;
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// Configure the RMT channel for TX
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bzero(&config, sizeof(rmt_config_t));
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@ -88,9 +92,10 @@ RMTPin::RMTPin(byte pin, byte ch, byte plen) {
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config.channel = channel = (rmt_channel_t)ch;
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config.clk_div = 1; // use 80Mhz clock directly
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config.gpio_num = (gpio_num_t)pin;
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config.mem_block_num = 1; // With MAX_PACKET_SIZE = 5 and number of bits needed
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// MAX_PACKET_SIZE+1 * 8 + MAX_PACKET_SIZE = 54 one
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// mem block of 64 RMT items (=DCC bits) should be enough
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config.mem_block_num = 2; // With longest DCC packet 11 inc checksum (future expansion)
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// number of bits needed is 22preamble + start +
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// 11*9 + extrazero + EOT = 124
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// 2 mem block of 64 RMT items should be enough
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// this was not our problem https://esp32.com/viewtopic.php?t=5252
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//periph_module_disable(PERIPH_RMT_MODULE);
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@ -114,24 +119,54 @@ RMTPin::RMTPin(byte pin, byte ch, byte plen) {
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// send one bit to kickstart the signal, remaining data will come from the
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// packet queue. We intentionally do not wait for the RMT TX complete here.
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rmt_write_items(channel, preamble, preambleLen, false);
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preambleNext = false;
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dataNext = false;
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//rmt_write_items(channel, preamble, preambleLen, false);
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RMTprefill();
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preambleNext = true;
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dataReady = false;
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RMTinterrupt();
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}
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void IRAM_ATTR RMTPin::RMTinterrupt(rmt_channel_t channel) {
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void RMTPin::RMTprefill() {
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rmt_fill_tx_items(channel, preamble, preambleLen, 0);
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rmt_fill_tx_items(channel, idle, idleLen, preambleLen-1);
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}
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if (preambleNext) {
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rmt_fill_tx_items(channel, preamble, preambleLen, 0);
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preambleNext = false;
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} else {
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if (dataNext) {
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rmt_fill_tx_items(channel, packetBits, packetLen, 0);
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} else {
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// here we should not get as now we need to send idle packet
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rmt_fill_tx_items(channel, idle, idleLen, 0);
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const byte transmitMask[] = {0x80, 0x40, 0x20, 0x10, 0x08, 0x04, 0x02, 0x01};
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bool RMTPin::fillData(const byte buffer[], byte byteCount, byte repeatCount=1) {
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if (dataReady == true || dataRepeat > 0) // we have still old work to do
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return false;
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byte bitcounter = 0;
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for(byte n=0; n<byteCount; n++) {
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for(byte bit=0; bit<8; bit++) {
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if (buffer[n] & transmitMask[bit])
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setDCCBit1(data + bitcounter++);
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else
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setDCCBit0(data + bitcounter++);
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}
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preambleNext = true;
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setDCCBit0(data + bitcounter++); // zero at end of each byte
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}
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rmt_tx_start(channel,true);
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setDCCBit1(data + bitcounter-1); // overwrite previous zero bit with one bit
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setDCCBit0Last(data + bitcounter++); // extra 0 bit after end bit
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setEOT(data + bitcounter++); // EOT marker
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dataLen = bitcounter;
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dataReady = true;
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dataRepeat = repeatCount;
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return true;
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}
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void IRAM_ATTR RMTPin::RMTinterrupt() {
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rmt_tx_start(channel,true);
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/* byte foo[3];
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foo[0] = 0xF0;
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foo[1] = 0x0F;
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foo[2] = 0xAA;
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fillData(foo, 3);*/
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if (dataReady) {
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rmt_fill_tx_items(channel, data, dataLen, preambleLen-1);
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dataReady = false;
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}
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if (dataRepeat > 0)
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dataRepeat--;
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return;
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}
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13
DCCRMT.h
13
DCCRMT.h
@ -29,8 +29,10 @@
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class RMTPin {
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public:
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RMTPin(byte pin, byte ch, byte plen);
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void IRAM_ATTR RMTinterrupt(rmt_channel_t);
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void IRAM_ATTR RMTinterrupt();
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void RMTprefill();
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bool fillData(const byte buffer[], byte byteCount, byte repeatCount);
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static RMTPin mainRMTPin;
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static RMTPin progRMTPin;
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@ -43,9 +45,10 @@ class RMTPin {
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byte idleLen;
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rmt_item32_t *preamble;
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byte preambleLen;
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rmt_item32_t packetBits[64];
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byte packetLen;
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rmt_item32_t *data;
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byte dataLen;
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// flags
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volatile bool preambleNext = true; // alternate between preamble and content
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volatile bool dataNext = false; // do we have real data available or send idle
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volatile bool dataReady = false; // do we have real data available or send idle
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volatile byte dataRepeat = 0;
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};
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@ -25,7 +25,6 @@
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#include "DCCTimer.h"
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#include "DIAG.h"
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#include "freeMemory.h"
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#include "DCCRMT.h"
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DCCWaveform DCCWaveform::mainTrack(PREAMBLE_BITS_MAIN, true);
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DCCWaveform DCCWaveform::progTrack(PREAMBLE_BITS_PROG, false);
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@ -39,7 +38,7 @@ uint8_t DCCWaveform::trailingEdgeCounter=0;
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void DCCWaveform::begin(MotorDriver * mainDriver, MotorDriver * progDriver) {
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RMTPin *p = new RMTPin(21, 0, PREAMBLE_BITS_MAIN);
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mainTrack.rmtPin = new RMTPin(21, 0, PREAMBLE_BITS_MAIN);
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mainTrack.motorDriver=mainDriver;
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progTrack.motorDriver=progDriver;
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@ -64,6 +63,13 @@ volatile bool ackflag = 0;
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#endif
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void IRAM_ATTR DCCWaveform::loop(bool ackManagerActive) {
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if (mainTrack.packetPendingRMT) {
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mainTrack.rmtPin->fillData(mainTrack.pendingPacket, mainTrack.pendingLength, mainTrack.pendingRepeats);
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mainTrack.packetPendingRMT=false;
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// sentResetsSincePacket = 0 // later when progtrack
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}
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#ifdef SLOW_ANALOG_READ
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if (ackflag) {
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progTrack.checkAck();
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@ -122,6 +128,7 @@ const byte bitMask[] = {0x00, 0x80, 0x40, 0x20, 0x10, 0x08, 0x04, 0x02, 0x01};
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DCCWaveform::DCCWaveform( byte preambleBits, bool isMain) {
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isMainTrack = isMain;
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packetPending = false;
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packetPendingRMT = false;
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memcpy(transmitPacket, idlePacket, sizeof(idlePacket));
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state = WAVE_START;
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// The +1 below is to allow the preamble generator to create the stop bit
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@ -290,7 +297,7 @@ void IRAM_ATTR DCCWaveform::interrupt2() {
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// Wait until there is no packet pending, then make this pending
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void DCCWaveform::schedulePacket(const byte buffer[], byte byteCount, byte repeats) {
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if (byteCount > MAX_PACKET_SIZE) return; // allow for chksum
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while (packetPending);
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while (packetPending||packetPendingRMT);
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portENTER_CRITICAL(&timerMux);
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byte checksum = 0;
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for (byte b = 0; b < byteCount; b++) {
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@ -302,6 +309,7 @@ void DCCWaveform::schedulePacket(const byte buffer[], byte byteCount, byte repea
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pendingLength = byteCount + 1;
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pendingRepeats = repeats;
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packetPending = true;
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packetPendingRMT = true;
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sentResetsSincePacket=0;
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portEXIT_CRITICAL(&timerMux);
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}
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@ -20,6 +20,7 @@
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#ifndef DCCWaveform_h
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#define DCCWaveform_h
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#include "DCCRMT.h"
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#include "MotorDriver.h"
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// Wait times for power management. Unit: milliseconds
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@ -82,6 +83,7 @@ class DCCWaveform {
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}
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void schedulePacket(const byte buffer[], byte byteCount, byte repeats);
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volatile bool packetPending;
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volatile bool packetPendingRMT;
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volatile byte sentResetsSincePacket;
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volatile bool autoPowerOff=false;
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void setAckBaseline(); //prog track only
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@ -122,6 +124,7 @@ class DCCWaveform {
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bool isMainTrack;
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MotorDriver* motorDriver;
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RMTPin* rmtPin;
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// Transmission controller
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byte transmitPacket[MAX_PACKET_SIZE+1]; // +1 for checksum
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byte transmitLength;
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@ -1 +1 @@
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#define GITHUB_SHA "ESP32-2021114-15:35"
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#define GITHUB_SHA "ESP32-2021115-22:27"
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