7 Commits

Author	SHA1	Message	Date
Daniele Viganò	49277da9ab	Add ram/storage folder to the repo for CI	2022-04-20 13:21:16 +02:00
Daniele Viganò	d594dbe47c	Rename DCC project into RAM ... RAM: Railroad Assets Manager	2022-04-10 21:05:02 +02:00
Daniele Viganò	9a1740f7c1	Extend manufacturer and make volume frendly	2022-04-06 21:24:00 +02:00
Daniele Viganò	ad86a39219	Add support for containers and simulation	2022-01-02 16:23:35 +01:00
Daniele Viganò	4293fc20bd	Update gitignore	2021-12-18 01:07:07 +01:00
Daniele Viganò	a6005615e0	Add driver app	2021-12-18 00:33:46 +01:00
Daniele Viganò	2adb3607d5	Initial commit	2021-12-15 22:32:27 +01:00