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Daniele Viganò d594dbe47c Rename DCC project into RAM 
RAM: Railroad Assets Manager
2022-04-10 21:05:02 +02:00
arduino
Update submodules
2022-04-02 21:40:45 +02:00
daemons
Update simulator
2022-04-02 22:53:06 +02:00
ram
Rename DCC project into RAM
2022-04-10 21:05:02 +02:00
.gitignore
Rename DCC project into RAM
2022-04-10 21:05:02 +02:00
.gitmodules
Add more arduino related sub-modules
2021-12-27 19:09:25 +01:00
LICENSE
Initial commit
2021-12-15 22:32:27 +01:00
README.md
Initial commit
2021-12-15 22:32:27 +01:00
requirements-dev.txt
Initial commit
2021-12-16 15:41:07 +01:00
requirements.txt
Add consist app
2022-04-02 12:43:40 +02:00

README.md

django-dcc

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Description
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Readme AGPL-3.0 15 MiB
Languages
Python 60.7%
HTML 18.8%
JavaScript 12.6%
CSS 7.2%
Makefile 0.6%