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mirror of https://github.com/DCC-EX/CommandStation-EX.git synced 2024-12-23 21:01:25 +01:00
Commit Graph

2489 Commits

Author SHA1 Message Date
Asbelos
7177affad4 Merge branch 'devel' into devel-railcom2 2024-10-27 13:54:14 +00:00
Asbelos
c50f3e016c No functional change
Unused parameter removal & end of file tidying by the Arduino IDE
2024-10-27 13:53:34 +00:00
Asbelos
f910e75da0 memory saving 2024-10-27 12:28:59 +00:00
Asbelos
158cb47474 <r> response and timing issue. 2024-10-24 09:43:52 +01:00
pmantoine
535dcabcec Initial working IO_TCA8418 driver 2024-10-24 13:19:07 +08:00
Asbelos
44869a549d pom read timeout 2024-10-23 15:45:44 +01:00
Asbelos
a0a503ad7d POM Read 2024-10-23 14:11:36 +01:00
Asbelos
68809fa8d5 Exrail multiple enter/exits 2024-10-23 11:58:26 +01:00
Asbelos
d25173e0b4 Correct high bit long addr 2024-10-22 22:14:23 +01:00
Asbelos
a849dddc9c oops 2024-10-22 11:55:18 +01:00
Asbelos
9ccf1fe41a Channel2 support 2024-10-22 09:55:57 +01:00
Asbelos
dd42390ae9 Prep last packet id 2024-10-21 19:37:39 +01:00
Asbelos
fae713eae7 railcom tidy 2024-10-19 12:24:14 +01:00
Asbelos
a49cb95795 detection happening! 2024-10-17 21:48:30 +01:00
Asbelos
7bd790dfbf cleaner IO_I2CRailcom 2024-10-15 08:32:51 +01:00
Asbelos
0341d803cc Merge branch 'devel-railcom2' of https://github.com/DCC-EX/CommandStation-EX into devel-railcom2 2024-10-14 13:51:11 +01:00
kempe63
2b3002b0d8 Update IO_I2CRailcom.h
Build a new RC sensor, now receive RC RX data in UART, but it looks the UART REG_LVL is read out of sync with the cutout. Sent traces to Chris, and the sensor will follow asap
2024-10-13 15:54:33 +01:00
Harald Barth
1d18d5dea5 explain RMT variations 2024-10-12 21:41:40 +02:00
Asbelos
0da9df648f Merge branch 'devel' into devel-railcom2 2024-10-11 12:13:27 +01:00
Asbelos
21c01ab69a TM1638 support 2024-10-10 19:42:27 +01:00
Asbelos
fa00e9e11b Squashed commit of the following:
commit f13824164b
Author: Asbelos <asbelos@btinternet.com>
Date:   Thu Oct 10 16:07:42 2024 +0100

    _s7 keyword generator

commit 8a7dc2643c
Author: Asbelos <asbelos@btinternet.com>
Date:   Mon Oct 7 10:54:05 2024 +0100

    comments

commit 801cddfef7
Author: Asbelos <asbelos@btinternet.com>
Date:   Sun Oct 6 13:24:07 2024 +0100

    simpler macro insert

commit 5883f474ee
Author: Asbelos <asbelos@btinternet.com>
Date:   Sun Oct 6 13:18:29 2024 +0100

    Auto include

commit 312fc255e4
Author: Asbelos <asbelos@btinternet.com>
Date:   Sun Oct 6 13:12:51 2024 +0100

    Cleanup to one class

commit 3094074349
Author: Asbelos <asbelos@btinternet.com>
Date:   Sun Oct 6 10:34:16 2024 +0100

    peeled back

commit aa2a6ad119
Author: Asbelos <asbelos@btinternet.com>
Date:   Sat Oct 5 18:27:43 2024 +0100

    all fastpins

commit 931baf4b6d
Author: Asbelos <asbelos@btinternet.com>
Date:   Sat Oct 5 16:28:03 2024 +0100

    Partial lib extract

commit 47bc3b55fc
Author: Asbelos <asbelos@btinternet.com>
Date:   Fri Oct 4 15:41:51 2024 +0100

    fixes and SEG7 macro

commit 3f26ca2d1a
Author: Asbelos <asbelos@btinternet.com>
Date:   Fri Oct 4 14:33:23 2024 +0100

    enums for exrail easy

commit 7e7c00594b
Author: Asbelos <asbelos@btinternet.com>
Date:   Fri Oct 4 13:16:57 2024 +0100

    Working

commit fc4df87848
Author: Asbelos <asbelos@btinternet.com>
Date:   Fri Oct 4 09:27:46 2024 +0100

    leds and buttons
2024-10-10 19:38:35 +01:00
kempe63
0a07405b46 Corrections
Corrections see previous update
2024-10-06 23:13:31 +01:00
kempe63
6293b0ae1d Update I2CRailcom.h
Do a TX of 0x09 to check if baudrate is set correctly at end of Init_SC16IS752()
Strange thing is that the UART sent the 0x09 twice, the call is only done once
Fixed readback when sending a SRESET, see comments
Checked if I can read the LSR, not errors
Still no data entering the UART as the RXLV register stay at 0
2024-10-06 22:55:10 +01:00
pmantoine
f5014f5595 Further STM32 TrackManager fix 2024-10-03 09:28:55 +08:00
Asbelos
4739bb16ff Fix ESP32 compile error 2024-10-01 12:32:58 +01:00
Asbelos
39c598f195 Connect IO_Railcom to Exrail 2024-10-01 12:29:16 +01:00
Harald Barth
0b6b7bcb0d Make it compile for ESP32 (BUSY is a global symbol :-() 2024-09-30 13:14:23 +02:00
Asbelos
ee3de150ca Railcom locoid 2024-09-30 12:01:25 +01:00
Asbelos
29e9b8cef5 Railcom Decoder 2024-09-30 11:00:37 +01:00
pmantoine
33c8ed19a9 Various STM32 related fixes 2024-09-30 16:13:00 +08:00
Harald Barth
0e99ad143b version 5.2.82 2024-09-30 10:07:07 +02:00
Harald Barth
01533e2cd2 TrackManager and EXRAIL: Introduce more consistent names for <= ...> and SET_TRACK 2024-09-30 10:05:47 +02:00
Asbelos
0712eef97a Merge branch 'devel-railcom2' of https://github.com/DCC-EX/CommandStation-EX into devel-railcom2 2024-09-28 23:11:30 +01:00
Harald Barth
f712f8f367 tag it 2024-09-28 22:37:25 +02:00
Harald Barth
9e8c9d5cc7 Make remider window 6 preamble bits bigger 2024-09-28 22:36:14 +02:00
Harald Barth
aebca646d9 Move railcom decisions into same block 2024-09-28 22:10:46 +02:00
Asbelos
d8635de854 Merge branch 'devel-railcom2' of https://github.com/DCC-EX/CommandStation-EX into devel-railcom2 2024-09-28 20:58:44 +01:00
Harald Barth
212708d88f Caculare from preamble start instead 2024-09-28 21:35:28 +02:00
Harald Barth
cbec612b0f Make Raicom code compile on ESP32 by moving out class Pinpair 2024-09-28 21:14:41 +02:00
pmantoine
07ab7286ba STM32 Ethernet support 2024-09-28 19:48:11 +08:00
Asbelos
e6bce0850f EXRAIL BLOCKENTER 2024-09-28 12:29:12 +01:00
Asbelos
77de250996 Add IO_I2CRailcom 2024-09-28 08:59:47 +01:00
Asbelos
61c8f6b047 Railcom timing 2024-09-27 12:21:43 +01:00
Asbelos
dc481a2f0c EthernetInterface 2024-09-23 09:34:26 +01:00
Asbelos
692f97e480 Merge branch 'devel_fozzie2' into devel 2024-09-23 09:16:39 +01:00
Asbelos
7fb7751f19 Merge branch 'devel_fozzie2' of https://github.com/DCC-EX/CommandStation-EX into devel_fozzie2 2024-09-23 08:50:13 +01:00
Asbelos
546ddd8139 STRCHR_P for sensorcam 2024-09-23 08:42:49 +01:00
Harald Barth
4aa353edbc version 5.2.79 2024-09-22 21:03:36 +02:00
Harald Barth
c1d6ee2804 Merge branch 'wifirestart' into devel 2024-09-22 21:01:16 +02:00
Harald Barth
14360b4198 serial manager loop that handles quoted strings 2024-09-22 20:58:17 +02:00